Algotochip Corporation

Sanjay Banerjee

Satish Padmanabhan

Suresh Kadiyala

Pius Ng

Ananth Durbha

Anand Pandurangan

Siva Selvaraj

Systems and methods are disclosed to automatically generate a processor architecture for a custom integrated circuit (IC) described by a computer readable code. The IC has one or more timing and hardware constraints. The system extracts parameters defining the processor architecture from a static profile and a dynamic profile of the computer readable code; iteratively optimizes the processor architecture by changing one or more parameters until all timing and hardware constraints expressed as a cost function are met; and synthesizes the generated processor architecture into a computer readable description of the custom integrated circuit for semiconductor fabrication.

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San Jose, CA, United States of America

Sanjay Banerjee