Samsung Electronics Co., Ltd.

Sangyong Yoon

Kitae Park

Jinman Han

Kyungryun Kim

Wonseok Lee

Sang-Hyun Joo

Kiwhan Song

Young-Jin Cho

Ohsuk Kwon

BoGeun Kim

Youngsun Song

Seung-Hwan Shin

Bu-il Nam

Doo-Yeun Jung

Nari Lee

Seung-Cheol Han

Yeji Nam

Ki-Tae Park

Il Han Park

Donghun Kwak

Hongrak Son

Jaeyong Jeong

Yongsung Cho

Kihwan Choi

Joonsuc Jang

Myung-Hoon Choi

Yoon Jin Kim

Seongsik Hwang

KeeHo Jung

Joon Young Kwak

Sihwan Kim

Sang-wan Nam

Goeun Jung

Kyehyun Kyung

Kookhyun Cho

Jae-hoon Choi

Chang-Wook Seo

A memory device includes a test mode detector circuit that determines whether the memory device has entered a test mode based on at least one test mode entry signal received through at least one pin of a plurality of pins and generates a test mode detection signal, and a test pad connection circuit that electrically couples a first pin of the plurality of pins to a dedicated test pad of the test mode such that a signal applied to the first pin is transmitted to the dedicated test pad based on the test mode detection signal.

Memory device including test pad connection circuit

A memory package includes a printed circuit board, a first memory device that is stacked on the printed circuit board, and a second memory device stacked on the first memory device. The first memory device includes a first one-time programmable (OTP) block, the second memory device includes a second OTP block different from the first OTP block, and a horizontal distance from one side of the first memory device to the first OTP block is different from a horizontal distance from one side of the second memory device to the second OTP block.

Memory device including one-time programmable block and operation method thereof

An operation method of a nonvolatile memory device which includes a memory block having wordlines includes performing an erase on the memory block, performing a block verification on the memory block by using a 0-th erase verification voltage, performing a delta verification on the memory block by using a first erase verification voltage different from the 0-th erase verification voltage when a result of the block verification indicates a pass, and outputting information about an erase result of the memory block based on the result of the block verification or a result of the delta verification. The delta verification includes generating delta counting values respectively corresponding to wordline groups by using the first erase verification voltage, generating a delta value based on the delta counting values, and comparing the delta value and a first reference value.

Operation method of nonvolatile memory device

A read method of a nonvolatile memory device includes reading data from a selected memory area of the nonvolatile memory device according to a first read voltage; detecting and correcting an error of the read data; and deciding a second read voltage for reading the selected memory area when an error of the read data is uncorrectable. The second read voltage is decided according to either the number of logical 0s or 1s included in the read data, or a ratio of logical 1s to logical 0s in the read data.

Storage device including nonvolatile memory device and read method thereof

A method of operating a storage device includes a nonvolatile memory device, a controller configured to control the nonvolatile memory device and a temperature sensor configured to measure a temperature of the nonvolatile memory device. The method includes calculating an average sensing temperature of a sensing temperature measured by the temperature sensor for a period of time, and periodically calculating an elapsed time of data after the data is programmed in the nonvolatile memory device based upon the average sensing temperature.

Storage device, operation method of storage device and method of accessing storage device

In one embodiment, the method includes determining whether a selection transistor of a currently programmed memory string in the memory has deteriorated, and copying data in the currently programmed memory string to a different memory string of the memory if the determining determines the selection transistor has deteriorated.

Method of managing a memory, and a memory system

A program method of a storage device which includes at least one nonvolatile memory device and a memory controller to control the at least one nonvolatile memory device, the program method comprising: performing a first normal program operation to store first user data in a memory block; detecting, at the memory controller, a first event; performing a dummy program operation to store dummy data in at least one page of the memory block in response to the detection of the first event; and performing a second normal program operation to store second user data in the memory block after the dummy program operation, dummy program operations being operations in which random data is programmed into the memory block, normal program operations being operations in which data other than random data is programmed in the memory block.

Storage and programming method thereof

A read method of a storage device includes performing a first read operation on a nonvolatile memory device based on a time stamp table storing a program time and a time-read level look-up table indicating a read level shift due to a program lapsed time. A determination is made whether to adjust the time-read level look-up table based on a result of the first read operation. As a consequence of determining to adjust the time-read level look-up table, adjusting the time-read level look-up table through a valley search operation and performing a second read operation on the nonvolatile memory device based on the time stamp table and the adjusted time-read level look-up table.

Storage device and read methods thereof

A nonvolatile memory system includes a nonvolatile memory device including a plurality of memory cells, and a memory controller. The memory controller is configured to count a clock to generate a current time, program dummy data at predetermined memory cells among the plurality of memory cells at a power-off state, detect a charge loss of the predetermined memory cells when a power-on state occurs after the power-off state, and restore the current time based on the detected charge loss.

Nonvolatile memory system including nonvolatile memory device and memory controller and operating method of memory controller

In one embodiment, the method includes performing a read operation on a memory, and determining, by a memory controller, whether to perform a reliability verification read operation based on a count value and a reference value. The count value is based on a number of read commands issued by the memory controller to the memory, and the reliability verification read operation is for reading data from at least one memory cell associated with at least one unselected word line in the memory. An unselected word line is a word line not selected during the read operation. The method further includes performing the reliability verification read operation for the at least one unselected word line based on the determining.

Memory, memory controller, memory system, method of memory, memory controller and memory system

A program method for a nonvolatile memory system including a reprogram operation that does not require a reload of first program data to page buffers of a constituent nonvolatile memory device between execution of a first coarse program step and execution of a first fine program step being performed after the execution of an intervening second coarse program step.

Nonvolatile memory system and programming method including a reprogram operation using a page buffer to reduce data load operations

A read method of a multi-level cell memory device includes receiving a first read command, and reading first and second hard decision data by performing first and second hard decision read operations using a first hard decision read voltage and a second hard decision read voltage, respectively, the second hard decision read voltage being higher than the first hard decision read voltage. The method further includes selecting one of the first and second hard decision read voltages, reading first soft decision data by performing a first soft decision read operation using a plurality of soft decision read voltages having voltage levels which are different from that of the selected one of the first and second hard decision read voltages, and providing the first soft decision data to a memory controller for first error correction code (ECC) decoding.

Multi-level cell memory device and method of operating multi-level cell memory device

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Seoul, South Korea

Sangyong Yoon