Samsung Electronics Co., Ltd.

Sangwuk Park

Sang Woo Lee

Junsoo Kim

Woo Bin Song

Chankyung Kim

Hyuk Kim

Minhee Cho

Gang Zhang

Yong-Hyun Kwon

Hei Seung Kim

Kye Hyun Baek

Jaehong Min

Jungpyo Hong

Yonghwan Kim

Seungjae Lee

Ho Young Lee

Yongjin Kim

Jinyoung Park

Geum Jung Seong

Joonkyu Rhee

Ho Dong Lee

Chanmi Lee

Sanggyo Chung

Kyoungsub Shin

Hyunchul Yoon

Brad H Lee

Yejeong Seo

Chanmin Lee

Yuna Lee

Yangdoo Kim

Minkyu Suh

Dokeun Lee

Geonyeop Lee

A semiconductor memory device includes a stack structure including word lines and interlayer dielectric patterns that are alternately and repeatedly stacked on a semiconductor substrate. Semiconductor patterns are respectively disposed between vertically adjacent word lines. A bit line vertically extends from the semiconductor substrate and contacts the semiconductor patterns. A capping insulating pattern is disposed between the bit line and the word lines and covers side surfaces of the interlayer dielectric patterns. Memory elements are respectively disposed between vertically adjacent interlayer dielectric patterns. Each of the semiconductor patterns comprises a first source/drain region that contacts the bit line, a second source/drain region that directly contacts one memory element of the memory elements, and a channel region between the first and second source/drain regions. A largest width of the first source/drain region is greater than a width of the channel region.

Semiconductor memory device and method of fabricating the same

A method of fabricating a semiconductor device includes forming an insulating layer and a peripheral structure on first and second regions of the substrate, forming first and second mask layers on the insulating layer and the peripheral structure, patterning the first and second mask layers to form first and second mask structures on the first and second regions, etching the insulating layer using the first and second mask structures as an etching mask, to form insulating patterns, forming a sacrificial layer in spaces between two adjacent insulating patterns on the first region, removing the second mask pattern on the first region by a dry etching process, forming an anti-oxidation layer on a surface of the second mask layer on the second region after removing the second mask pattern on the first region, and removing the second mask layer with the anti-oxidation layer by a wet etching process.

Method of fabricating semiconductor device

A method of manufacturing an integrated circuit device includes forming a mold structure, which has a mold layer and a support layer sequentially stacked, on a substrate, forming a vertical hole through the mold structure in a vertical direction and a bowing space extending outward from the vertical hole in a horizontal direction in a first vertical level area, exposing the vertical hole and the bowing space to a preprocessing atmosphere to make the support layer have a first surface state and the mold layer have a second surface state different from the first surface state, forming a bowing complementary pattern filling the bowing space by a selective deposition process using the difference between the first surface state and the second surface state, and forming a lower electrode in the vertical hole and in contact with the mold layer, the support layer, and the bowing complementary pattern.

Method of manufacturing integrated circuit device

Methods of forming a semiconductor device may include: providing a substrate on which a layer is formed; forming a lower hard-mask layer, which includes silicon, on the layer; forming an upper hard-mask pattern, which includes oxide, on the lower hard-mask layer; forming a lower hard-mask pattern by etching the lower hard-mask layer using the upper hard-mask pattern as an etch mask and using an etching gas that includes a metal-chloride-based first gas and a nitride-based second gas; and forming a plurality of contact holes in the layer by etching the material layer using the lower hard-mask pattern as an etch mask.

Methods of forming semiconductor devices

A semiconductor device can include a semiconductor substrate and an active region in the semiconductor substrate, where the active region can include an oxide semiconductor material having a variable atomic concentration of oxygen. A first source/drain region can be in the active region, where the first source/drain region can have a first atomic concentration of oxygen in the oxide semiconductor material. A second source/drain region can be in the active region spaced apart from first source/drain region and a channel region can be in the active region between the first source/drain region and the second source/drain region, where the channel region can have a second atomic concentration of oxygen in the oxide semiconductor material that is less than the first atomic concentration of oxygen. A gate electrode can be on the channel region and extend between the first source/drain region and the second source/drain region.

Method of forming a semiconductor device including an active region with variable atomic concentration of oxide semiconductor material

Semiconductor device including active region with variable atomic concentration of oxide semiconductor material and method of forming the same

Provided is a semiconductor memory device. The semiconductor memory device includes a peripheral circuit gate pattern on a first substrate, an impurity region in the first substrate and spaced apart from the peripheral circuit gate pattern, a cell array structure on the peripheral circuit gate pattern, a second substrate between the peripheral circuit gate pattern and the cell array structure, and a via that is in contact with the impurity region and disposed between the first substrate and the second substrate. The via electrically connects the first and second substrates to each other.

Semiconductor memory devices

Disclosed is an apparatus for processing a semiconductor and a method for generating a seasoning process of a reaction chamber. The method may include generating plasma in the reaction chamber using a production process recipe, obtaining at least one reference measurement value related to a byproduct of the generated plasma, performing a plurality of seasoning tests on the chamber to obtain a plurality of test results, generating an empirical model by forming at least one relational expression correlating variables manipulated during the performing of the plurality of seasoning tests to the plurality of test results, and estimating a seasoning process by using the at least one relational expression to estimate at least one estimated calculation value.

Equipment for manufacturing semiconductor device and seasoning process method of the same

Methods for optimizing a plasma process are provided. The method may include obtaining a measurement spectrum from a plasma reaction in a chamber, calculating a normalized measurement standard and a normalized measurement spectrum of the measurement spectrum, comparing the normalized measurement spectrum with a normalized reference spectrum, and comparing the normalized measurement standard with a normalized reference standard to determine whether to change a process parameter of the plasma process or clean the chamber when the normalized measurement spectrum and the normalized reference spectrum are mismatched.

Methods for optimizing a plasma process

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Hwaseong-si, South Korea

Sangwuk Park