Korea University Research and Business Foundation

Samsung Electronics Co., Ltd.

Intellectual Discovery Co., Ltd.

Korea University Industrial Academic Collaboration Foundation

Kiju Im

Sangsig Kim

Kyoungah Cho

Minsuk Kim

Doohyeok Lim

Eun Joo Jang

Hyunsuk Kim

Yoonjoong Kim

Youngin Jeon

Sola Woo

Dong-Won Kim

Jinyong Choi

Dong Hyuk Yeom

Jae-Won Jang

Chang Jun Yoon

Dong Young Jeong

Jonggoo Lee

Myeong-Won Lee

Kyoung-Ah Cho

A semiconductor device includes a semiconductor column including a first conductive region of first conductivity type, a second conductive region of second conductivity type, an intrinsic region disposed between the first conductive region and the second conductive region, and a barrier region of the first conductivity type disposed between the intrinsic region and the second conductive region. A gate electrode is disposed to cover the intrinsic region, and a gate insulating layer is disposed between the gate electrode and the intrinsic region. The semiconductor device may operate as a switch or a volatile memory according to a gate voltage applied to a gate and a drain voltage applied to a drain.

Semiconductor device

A semiconductor device includes stacked transistors. Each of the transistors includes a semiconductor column including a first conductive region of first conductivity type, a second conductive region of second conductivity type, an intrinsic region disposed between the first conductive region and the second conductive region, and a barrier region of the first conductivity type disposed between the intrinsic region and the second conductive region. A gate electrode is disposed to cover the intrinsic region, and a gate insulating layer is disposed between the gate electrode and the intrinsic region.

Logic semiconductor device

A memory device includes: a semiconductor column extending vertically on a substrate and including a source region of a first conductivity type, an intrinsic region, and a drain region of a second conductivity type; a first gate electrode disposed adjacent to the drain region to cover the intrinsic region; a second gate electrode spaced apart from the first gate electrode and disposed adjacent to the source region to cover the intrinsic region; a first gate insulating layer disposed between the first gate electrode and the intrinsic region; and a second gate insulating layer disposed between the second gate electrode and the intrinsic region.

Dual gate semiconductor memory device with vertical semiconductor column

Provided is a probe station system which can measure thermal distribution and thermographic images. More particularly, a probe station is provided which can detect an electrical characteristics change according to the supply of heat to an element, for example a thermoelectric element to measure the characteristics of the element. The probe station for the simultaneous measurement of thermal and electrical characteristics of a thermoelectric element includes: a chamber, a base, a platform, a probe unit, a heat source, and an infrared image detection unit and the thermographic image and the voltage signal of the element are synchronized in real time.

Probe station for the simultaneous measurement of thermal and electrical characteristics of thermoelectric module

A transistor using a single crystal silicon nanowire and a method for fabricating the transistor is disclosed. The transistor using a single crystal silicon nanowire comprises a substrate and a single crystal silicon nanowire formed on the substrate. Here, the single crystal silicon nanowire comprises a source region and a drain region formed longitudinally with the single crystal silicon nanowire and separate from each other, and a channel region located between the source region and the drain region, wherein the perpendicular thickness of the channel region to the longitudinal direction is thinner than the thickness of the source region and the drain region.

Transistor using single crystal silicon nanowire and method for manufacturing same

A nonvolatile memory electronic device including nanowire channel and nanoparticle-floating gate nodes, in which the nonvolatile memory electronic device, which comprises a semiconductor nanowire used as a charge transport channel and nanoparticles used as a charge trapping layer, is configured by allowing the nanoparticles to be adsorbed on a tunneling layer deposited on a surface of the semiconductor nanowire, whereby charge carriers moving through the nanowire are tunneled to the nanoparticles by a voltage applied to a gate, and then, the charge carriers are tunneled from the nanoparticles to the nanowire by the change of the voltage that has been applied to the gate, whereby the nonvolatile memory electronic device can be operated at a low voltage and increase the operation speed thereof.

Nonvolatile memory electronic device including nanowire channel and nanoparticle-floating gate nodes and a method for fabricating the same

The present invention relates to a photodetector using nanoparticles, and more particularly, to a novel photodetector wherein surfaces of nanoparticles synthesized by a wet colloidal process are capped with organic materials which then serve as channels for electron migration, or nanoparticles, from which organic materials capped on the surfaces of nanoparticles are removed to form a close-packed particle structure, directly serve to transport electrons. In accordance with specific embodiments of the present invention, it is possible to improve performance of the photodetector and simplify the manufacturing process thereof.

Photodetector using nanoparticles

Provided are a heat generation sheet and a method of fabricating the same. The heat generation sheet includes: a base comprising first and second sides; a heat generation layer which is formed in at least one region of the first side of the base and in which a plurality of conductive nanoparticles are physically necked; a protective layer protecting the heat generation layer; and an electric feeding part supplying power to the heat generation layer. The heat generation layer is formed by coating and heat treating a nanoparticle dispersion solution.

Heat generation sheet and method of fabricating the same

The present invention relates to a method of manufacturing thin-film transistors using nanoparticles and thin film transistors manufactured by the method. A hydrophilic buffer layers are deposited on the substrates to facilitate formation of nanoparticle films. Sintered nanoparticles are used as an active layer and dielectric materials of high dielectric coefficient are also used as a gate dielectric layer to form a top gate electrode on the gate dielectric layer, thereby enabling low-voltage operation and low-temperature fabrication.

Growing community of inventors

Seoul, South Korea

Sangsig Kim