Samsung Electronics Co., Ltd.

Sangoak Woo

Dokyoon Kim

Jeonghwan Ahn

Keechang Lee

Soojung Ryu

Nikolay Yurievich Gerasimov

Yang Seok Ki

Minsu Ahn

Seungin Park

Youngsam Shin

Younggeon Yoo

Jeongae Park

Wonseb Jeong

Chanho Yoon

Beomkyu Shin

Jungmin Seo

Minkyu Jeong

Minyoung Son

Jeongsoo Park

Changmoo Kim

Haewoo Park

Seyoon Tak

Hyongeuk Lee

Myungjune Jung

Wonjong Lee

Jeongjoon Yoo

Jaedon Lee

Jongpil Son

Seokyoon Jung

Kwontaek Kwon

Seokjoong Hwang

Jeongwook Kim

Sundeep Krishnadasan

Seungcheol Baek

Jaeho Shin

Hoiju Chung

Krishnadasan Sundeep

JeongSoo Park

Vladimir Sergeevich Belyaev

Vladislav Germanovich Shubnikov

Hyun Jae Oh

An electronic device includes an input handling circuit, a control circuit, and a data transfer circuit. The input handling circuits receives a first request including an address from a first memory device, aligns the address with an access unit of a second memory device, requests a determination for the aligned address, and transmits a second request to the second memory device based on a determination result. The control circuit determines, based on the request, whether a duplicate address with the aligned address is present to generate the determination result and updates a bitmask based on the determination result. The data transfer circuit receives the second request from the second memory device and transfers data based on the bitmask. The bitmask includes one or more bits, each corresponding to the first request and indicating a location corresponding to the first request within an access unit of the second memory device.

Electronic device managing duplicate requests and method of operating the same

A storage device includes a nonvolatile memory device and a storage controller. The storage controller includes a multi-protocol host interface circuit that receives a first-type request including a first logical address from an external host and transmits/receives data corresponding to the first-type request with the external host by a block unit. Additionally, the multi-protocol host interface circuit receives a second-type request including a first physical address from the external host and transmits/receives data corresponding to the second-type request with the external host by a unit smaller than the block unit. A mapping cache manager manages an address translation table cache, sends an address translation request including the first physical address to the external host, and receives a response including mapping information corresponding to the first physical address from the external host.

Storage device, operation method of storage device, and storage system using the same

An operating method of a graphics processing unit includes: receiving a first read request for texels, detecting whether decompression data associated with each of the texels are present in a first cache, decompressing part of a first texture compression block associated with a first texel among the texels when a result of the detecting indicates decompression data for the first texel is not present in the first cache, to generate first decompression data, and generating first texture data corresponding to the first read request, based on the first decompression data and second decompression present in the first cache.

Graphics processing unit and operating method thereof

A method of performing path stroking includes determining whether or not aliasing based on a primitive included in a path will occur using data about the path, generating a texture to be used for performing path stroking based on a result of the determining, and mapping the texture along an edge of the primitive.

Method and apparatus for performing path stroking

A computing system includes a memory device comprising a memory array and an internal processor configured to perform a first sub pipeline of a graphics pipeline for tile-based rendering by using graphics data stored in the memory array, for offload processing of the first sub pipeline from a host processor; and the host processor configured to perform a second sub pipeline of the graphics pipeline by using a result of the first sub pipeline stored in the memory array.

Computing system and method of performing tile-based rendering of graphics pipeline

Provided are methods and apparatuses for adjusting the processing sequence of draw commands for rendering images. The rendering method including determining, at a processing sequence determiner, previous draw commands that are identical to current draw commands; de-termining a processing sequence of the current draw commands based on depth information of the determined previous draw commands; and performing a Z-test on the current draw commands based on the processing sequence, and performing shading based on a result of the Z-test.

Apparatus and method of rendering frame by adjusting processing sequence of draw commands

A rendering system includes: a ray generator configured to generate a ray; a memory chip configured to store information about objects in three-dimensional (3D) space; an intersection tester embedded in the memory chip and configured to perform an intersection test between the ray and the objects by using the information about the objects and information about the ray; and a shader configured to perform pixel shading based on a result of the intersection test.

Rendering system and method

A graphic processing apparatus and a method of performing a graphics pipeline in the graphic processing apparatus are provided. The method of performing a graphics pipeline in a graphic processing apparatus includes binning to generate a bounding box bitstream corresponding to a drawcall requiring tessellation, and in response to a bounding box allocated by the bounding box bitstream being identified in a current tile to be processed, rendering the current tile by performing selective tessellation on drawcalls corresponding to the identified bounding box.

Graphic processing apparatus and method of performing graphics pipeline

A method of generating an acceleration structure for ray tracing, the method including, using a processor, dividing a three-dimensional (3D) space including primitives into bounding boxes, obtaining position information of where the bounding boxes overlapping each other, and generating an acceleration structure representing the position information and an inclusion relation between the bounding boxes. Also disclosed is a related method of traversing an acceleration structure.

Method of generating and traversing acceleration structure

Provided is a method of managing commands, which includes receiving a frame buffer object (FBO) change command, comparing an FBO designated by the FBO change command with a FBO currently processed by a graphics processing unit (GPU) to determine whether the two FBOs are the same as each other, and managing the FBO change command or a flush command based on a result of the comparison.

Apparatus and method for managing commands

A rendering method includes receiving resolution information including an optimal resolution for rendering images constituting a frame, a number of multi-samples, and resolution factors of the respective images, rendering the images at the optimal resolution, and adjusting a resolution of each of the rendered images based on the resolution factors and the number of multi-samples.

Rendering apparatus and method

Provided are a rendering method and a rendering apparatus performing the rendering method. The rendering method includes receiving a request to output a hierarchical depth value stored in a hierarchical depth buffer, outputting the hierarchical depth value from the hierarchical depth buffer, storing the hierarchical depth value, in response to the request, and performing rendering using the stored hierarchical depth value.

A method and apparatus for rendering 3D graphics data. The method includes analyzing a characteristic of input 3D graphics data, reconstructing a rendering function based on the analyzed characteristic, and rendering the input 3D graphics data using the reconstructed rendering function. The characteristic of 3D graphics data to be rendered is analyzed and a rendering function is reconstructed only using code blocks corresponding to the analyzed characteristic, thereby minimizing the size of the rendering function.

Method and apparatus for rendering 3D graphics data

A method, apparatus, and medium for transforming a graphic data of an object and a computer readable recording medium storing a program for executing the method are provided. The method includes; determining at least one triangle to be collapsed among one or more triangles comprised in the object, determining a collapsing vertex to be created by collapsing the at least one triangle, and transforming the graphic data of the object based on information regarding the at least one triangle determined to be collapsed and information regarding the determined collapsing vertex. Thus, a large three-dimensional object can be efficiently rendered with a small amount of resources.

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Anyang-si, South Korea

Sangoak Woo