Samsung Electronics Co., Ltd.

Sangkil Lee

Hyunmog Park

Yusin Yang

So-young Kim

Minhee Cho

Chungsam Jun

Woobin Song

Wooseok Ko

Soo-woong Ahn

Jinmin Kim

Daehyun Kim

Hei Seung Kim

Sung Yoon Ryu

Hyunsik Park

Minkook Kim

Hyunwoo Kim

Jung Hwan Kim

Younghoon Sohn

Hyun Dae Lee

Souk Kim

Q-Han Park

Mira Park

Yong Deok Jeong

Kwanwoo Ryu

Disclosed are fusion memory devices and methods of fabricating the same. The fusion memory device comprises a first memory device including a first substrate having active and inactive surfaces opposite to each other and a first memory cell circuit on the active surface of the first substrate, a non-memory device including a second substrate having active and inactive surfaces opposite to each other and a non-memory circuit on the active surface of the second substrate, the non-memory device being provided on the first memory device, and a second memory device on the inactive surface of the second substrate and including a second memory cell circuit different from the first memory cell circuit. The non-memory device lies between the first and second memory cell circuits and controls an electrical operation of each of the first and second memory cell circuits.

Fusion memory device and method of fabricating the same

Disclosed is a semiconductor package comprising a logic die mounted on an interposer substrate, and a memory stack structure disposed side-by-side with the logic die. The memory stack structure includes a buffer die mounted on the interposer substrate, and a plurality of memory dies stacked on the buffer die. The buffer die has a first surface that faces the interposer substrate and a second surface that faces the plurality of memory dies. The number of data terminals on the second surface is greater the number of connection terminals on the first surface.

Semiconductor package

A memory device includes a substrate including first and second regions, the first region having first wordlines and first bitlines, and the second region having second wordlines and second bitlines, a first memory cell array including first memory cells in the first region, the first memory cell array having volatility, and each of the first memory cells including a cell switch having a first channel region adjacent to a corresponding first wordline of the first wordlines, and a capacitor connected to the cell switch, and a second memory cell array including second memory cells in the second region, the second memory cell array having non-volatility, and each of the second memory cells including a second channel region adjacent to a corresponding second wordline of the second wordlines, and a ferroelectric layer between the corresponding second wordline of the second wordlines and the second channel region.

Memory device having volatile and non-volatile memory cells

Memory device

Disclosed are mass flow controllers, apparatuses for manufacturing semiconductor devices, and methods of maintenance thereof. The mass flow controller may control an amount of a gas provided into a chamber. The mass flow controller may be configured to obtain an absolute volume of the gas provided into the chamber at a standard flow rate when the mass flow controller is initially used. The mass flow controller may be configured to obtain a detected flow rate of the gas provided at a measured flow rate after the mass flow controller has been used for a predetermined time. The mass flow controller may be configured to compare the detected flow rate and the standard flow rate to verify a full-scale error in the measured flow rate.

Mass flow controller, apparatus for manufacturing semiconductor device, and method for maintenance thereof

A method includes loading a substrate into a sensing chamber; while the substrate is in the sensing chamber, performing a spectral analysis of the substrate; transferring the substrate between the sensing chamber and a processing chamber coupled to the sensing chamber; processing the substrate in the processing chamber to form at least a first layer and/or pattern on the substrate; and based on at least the spectral analysis, determining whether a parameter resulting from the formation of first layer and/or pattern is satisfied.

Method of manufacturing a semiconductor device using semiconductor measurement system

A method of inspecting a semiconductor device includes providing a substrate, on which a mold layer with a plurality of mold openings is provided, milling the mold layer in a direction inclined at a predetermined angle with respect to a direction normal to a top surface of the substrate, such that an inclined cutting surface exposing milled mold openings is formed, the milled mold openings including first milling openings along a first column extending in a first direction and having different heights, obtaining image data of the cutting surface, the image data including first contour images of the first milling openings, and obtaining a first process parameter, which represents an extent of bending of the mold openings according to a distance from a top surface of the substrate, using positions of center points of the first contour images.

Method of inspecting semiconductor device and method of fabricating semiconductor device using the same

A semiconductor inspection system including an ion beam milling unit configured to irradiate at least one cluster-ion beam onto a surface of a sample wafer and etch the surface of the sample wafer and an image acquisition unit configured to irradiate an electron beam onto the etched surface of the sample wafer and acquire an image of the etched surface may be provided.

Semiconductor inspection system and methods of inspecting a semiconductor device using the same

Methods and apparatuses for inspecting a semiconductor device using electron beam are provided. The methods may include performing detection operations on a detection target pattern N times and determining a number of detection operations which have been performed until a maximum secondary electron amount of the detection target pattern is obtained. Each of the detection operations may include irradiating the detection target pattern with an electron beam, interrupting the irradiating and detecting a secondary electron amount of the detection target pattern after a detection waiting time has elapsed since the interrupting the irradiating.

Methods and apparatuses for inspecting semiconductor devices using electron beams

Growing community of inventors

Yongin-si, South Korea

Sangkil Lee