Samsung Electronics Co., Ltd.

Korea University Research and Business Foundation

Korea Advanced Institute of Science and Technology

Sangho Kim

Yongjin Lee

Junhyeok Yang

Sungmin Yoo

Musik Kwon

Moorim Kim

Seongtaek Hwang

Kwangho Kim

Soomin Lee

Hyungmin Lee

Taehwang Kong

Jooseong Kim

Woojoong Jung

Sodam Ju

Jahoon Jin

Kyunghwan Min

Hyongmin Lee

Seki Kim

Gyu-Hyeong Cho

Michael Choi

Dae-Yong Kim

Tae-Hwang Kong

Gwanhyung Kim

Yunho Lee

Junhee Shin

Dongha Lee

Sungyong Lee

Byeongbae Lee

Jihye Ha

Jaehyun Park

Hyunseok Nam

Boseok Moon

Yus Ko

Joowon Park

Hyunkyu Yun

Jaegon Lee

Joonseok Kim

Jongpil Lee

Sunmin Park

Huijun Shim

Jeongpyo Park

Jaehyuk Yang

Hyoungjoong Kim

Jeongwook Seo

Yohan Kwon

Hyunmyoung Kim

Donghoon Jung

Cheongjae Lee

Bongseok Park

Jaeseung Lee

Seun Shin

Eungha Kim

Iksu Lee

Yooseok Shon

Dooseok Yoon

Wookyeong Jeong

Ha Jihye

Disclosed is a receiver of a serial interface, comprising, a first multiplexer configured to select one of a data signal and a first reference voltage in response to an enable signal, a second multiplexer configured to select one of the first reference voltage and a second reference voltage in response to the enable signal, a comparator receiving an output of the first multiplexer to a positive input terminal and an output of the second multiplexer to a negative input terminal, and a reference generator configured to generate the second reference voltage and to generate the first reference voltage from the second reference voltage using an unity gain buffer.

Serial interface receiver and offset calibration method thereof

A temperature measurement circuit includes a band-gap reference circuit configured to generate a band-gap reference voltage that is fixed regardless of an operation temperature, a reference voltage generator circuit configured to generate a measurement reference voltage by adjusting the band-gap reference voltage, a sensing circuit configured to generate a temperature-variant voltage based on a bias current, where the temperature-variant voltage is varied depending on the operation temperature, an analog-digital converter circuit configured to generate a first digital code indicating the operation temperature based on the measurement reference voltage and the temperature-variant voltage, and an analog built-in self-test (BIST) circuit configured to generate a plurality of flag signals indicating whether each of the band-gap reference voltage, the measurement reference voltage, and a bias voltage corresponding to the bias current is included in a predetermined range.

Built-in self-test circuit and temperature measurement circuit including the same

Disclosed is a frequency detector. The frequency detector includes a first flip-flop sampling a clock signal based on a data signal to generate a first signal, a second flip-flop sampling a delayed-phase component of the clock signal based on the data signal or sampling the clock signal based on a delayed-phase component of the data signal to generate a second signal, a third flip-flop generating a third signal representing a polarity of a frequency difference between a data rate of the data signal and a frequency of the clock signal based on the first signal and the second signal, and a delay cell generating the delayed-phase component of the clock signal or the delayed-phase component of the data signal. The delayed-phase component has a delay amount set to a value smaller than about 0.25 UI.

Frequency detector and operating method thereof

Provided is a method of correcting a clock, the method including receiving a first clock, a second clock, a third clock, and a fourth clock, correcting each of a second rising edge of the second clock, a third rising edge of the third clock, and a fourth rising edge of the fourth clock based on a first rising edge of the first clock, and correcting each of a first falling edge of the first clock, a second falling edge of the second clock, a third falling edge of the third clock, and a fourth falling edge of the fourth clock based on a first rising edge of the first clock.

Clock edge correcting device and operating method thereof

A device includes a function circuit that operates based on power provided by a first positive supply voltage and a first negative supply voltage, a monitoring circuit that operates based on power provided by a second positive supply voltage and a second negative supply voltage and that generates a first monitor signal based on monitoring an operation of the function circuit, and an output circuit that generates a second monitor signal based on monitoring the first positive supply voltage, generates a third monitor signal based on monitoring the second positive supply voltage, and generates an output signal that is output through one or more output pins, based on the first monitor signal, the second monitor signal, and the third monitor signal.

Device and method for monitoring function circuit and outputting result of monitoring

A system-on-chip according to an embodiment includes a core including a header switch circuit configured to transmit a power supply voltage applied to a first power rail as a supply voltage to a second power rail and a logic circuit configured to operate based on the supply voltage from the second power rail, and a low-dropout (LDO) regulator configured to regulate a magnitude of first current output to the second power rail based on a change in the supply voltage, wherein the LDO regulator is further configured to control on/off of a plurality of first header switches included in the header switch circuit based on an amount of the change in the supply voltage.

System-on-chip including low-dropout regulator

A direct-current (DC)-DC converter includes a converting circuit including an inductor element. The converting circuit is configured to generate an output voltage from an input voltage based on a switching operation. An inductor current emulator is configured to adjust at least one parameter for changing a current peak value of the inductor element in response to a change in a level of the input voltage and is configured to generate an internal voltage based on the at least one parameter, which is adjusted. The inductor current emulator is configured to generate a control signal for controlling the switching operation such that current of the inductor element has a pattern corresponding to a pattern of the internal voltage.

DC-to-DC converter and integrated circuit including the same

A system on chip includes a core configured to maintain a clock gating state; a plurality of header switch circuits configured to deliver a supply voltage, which is reduced from an external supply voltage, to the core in response to a plurality of control signals; and a voltage regulator configured to monitor the supply voltage, change logic levels of the plurality of control signals according to a difference level corresponding to a difference between the supply voltage and a preset target voltage, and output the plurality of control signals of which the logic levels have been changed to the plurality of header switch circuits.

System on chip for supplying a voltage

A power manager circuit is provided. The power manager circuit includes a bandgap reference circuit, first and second monitoring circuits, and a reference buffer. The bandgap reference circuit generates a first voltage, based on an external voltage that is external to the power manager circuit. The first monitoring circuit determines a logical value of a first alarm signal, based on whether a first voltage level of the first voltage is within a first range. The reference buffer generates a second voltage, based on the first voltage. The second monitoring circuit determines a logical value of a second alarm signal, based on whether a second voltage level of the second voltage is within a second range.

Power manager circuit and electronic device for detecting internal errors

Disclosed is an electronic device, which includes an amplifier circuit that receives a feedback voltage and a reference voltage and amplifies a difference between the feedback voltage and the reference voltage to output an amplified difference voltage, an analog-to-digital converter that converts the amplified difference voltage to a digital code including two or more bits, and low-dropout (LDO) regulators that outputs output voltages based on the digital code. Each of the LDO regulators includes power transistors outputting a corresponding output voltage of the output voltages, drives one of the power transistors in a switching state, and drives each of remaining power transistors in a turned-on state or a turned-off state.

Electronic device including low-dropout regulators

A direct current (DC)-DC converter including: a power switching circuit including a first switch circuit and a second switch circuit that are connected in parallel to a switching node, the first switch circuit and the second switch circuit configured to generate a switching voltage signal through the switching node in response to an input DC voltage and configured to perform complementary switching operations to control a voltage level of the switching voltage signal; and a filter circuit configured to filter the switching voltage signal to generate an output DC voltage.

Power switching circuit, a DC-DC converter including the same and a voltage conversion method

A display apparatus includes a display, a plurality of light emitting elements that emit light of different wavelengths and a plurality of light receiving elements, and a processor that identifies intensities light emitted by the light emitting elements and received by the light receiving elements to identify a pen color of a touch pen on a basis of the intensities.

Display apparatus and control method thereof

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Suwon-si, South Korea

Sangho Kim