Maxlinear, Inc.

Sangeetha Gopalakrishnan

Vamsi Paidi

Sheng Ye

Wenjian Chen

Raghava Manas Bachu

Aspects of methods and systems for high frequency signal selection are provided. The system for high frequency signal selection comprises a first driver and a second driver. The first driver is able to receive a first high frequency input, and the second driver is able to receive a second high frequency input. The output of the first driver is operably coupled, via a first inductive element, to a first resistive load and a first buffer, and the second driver is operably coupled, via a second inductive element, to the output of the first driver. One or both of the first high frequency input and the second high frequency input may be transferred to the first buffer by selectively enabling a current to one or both of the first driver and the second driver, respectively.

Method and system for high frequency signal selection

Methods and systems for a sampled loop filter in a phase locked loop (PLL) may comprise a phase locked loop (PLL) comprising a phase frequency detector, a sampled loop filter comprising a plurality of capacitors and at least one switch, a plurality of voltage controlled oscillators (VCOs) coupled to said sampled loop filter, and a frequency divider. The PLL generates at least one clock signal, and the sampled loop filter samples an output signal from the phase frequency detector when an average of charge provided to a first of the plurality of capacitors in the sampled loop filter is zero. The frequency divider may be a fractional-N divider. A second switch in said sampled loop filter may have switching times that are non-overlapping with switching times of the at least one switch. Capacitors may be coupled to ground from each terminal of the second switch.

Method and system for a sampled loop filter in a phase locked loop (PLL)

Methods and systems for a distributed transmission line multiplexer for a multi-core multi-mode voltage-controlled oscillator (VCO) may comprise a plurality of voltage controlled oscillators (VCOs) arranged adjacent to each other, where each of the plurality of VCOs are operable to generate an output signal at a configurable frequency, an impedance matching circuit comprising a respective driver and impedance matching elements coupled to each of the plurality of VCOs, and an output device coupled to the impedance matching circuit. The impedance matching elements may include capacitors and inductors. Between each adjacent pair of the respective drivers coupled to each of the plurality of VCOs, the impedance matching elements may include two inductors coupled in series between the drivers and a capacitor coupled to ground and to a common node between the two inductors. Impedance values of the capacitors and inductors may be configurable. The impedance matching elements may include a resistor coupled to a bias voltage VDD and to a common node with a capacitor that is coupled to ground, where the common node is coupled to one of the inductors. The output device may include a prescaler that is an integer or fractional frequency-N divider, or a buffer. The respective drivers coupled to each of the plurality of VCOs may be configured to provide a constant output power no matter which of said plurality of VCOs is enabled.

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Carlsbad, CA, United States of America

Sangeetha Gopalakrishnan