Advanced Semiconductor Engineering, Inc.

Sangbae Park

Junyoung Yang

Hyeongno Kim

HyungJun Park

YongGil Lee

KyungSoo Rho

JinHee Won

Kun-A Kang

Hyung Jun Park

Yonggill Lee

Junhong Lee

Bae Doo Kim

A semiconductor package device includes a leadframe, a first die and a package body. The leadframe includes a first die paddle and a lead. The first die paddle has a first surface and a second surface opposite to the first surface. The first die is disposed on the first surface of the first die paddle. The package body covers the first die and at least a portion of the first surface of the first die paddle and exposing the lead. The package body has a first surface and a second surface opposite to the first surface. The second surface of the package body is substantially coplanar with the second surface of the first die paddle. The lead extends from the second surface of the package body toward the first surface of the package body. A length of the lead is greater than a thickness of the package body.

Semiconductor package device and method of manufacturing the same

A semiconductor package includes a semiconductor chip electrically connected to a plurality of leads arranged at the periphery of the semiconductor chip wherein each of the leads is bent to have a first portion exposed from the upper surface of the semiconductor package and a second portion exposed from the lower surface of the semiconductor package. Both of the first portion and the second portion of each lead can be utilized for making external electrical connection.

Semiconductor package and stack arrangement thereof

A process for making a plurality of leadless packages is disclosed. Firstly, chips are attached onto a lead frame with a first metal layer formed thereon. After a wire bonding step and an encapsulating step are conducted, a portion of each lead of the lead frame is etched away to form a first connection pad and a second connection pad which are separated from each other but are still electrically connected to each other via the first metal layer therebetween. Then, a second metal layer is electroplated on the connection pads and the die pads by using the first metal layer as an electrical path. Finally, the first metal layer between the first connection pads and the second connection pads is removed, and a singulation step is conducted to complete the process. The present invention further provides a new lead frame design.

Process and lead frame for making leadless semiconductor packages

A process for making a plurality of leadless packages is disclosed. Firstly, chips are attached onto a lead frame with a first metal layer formed thereon. Each lead of the lead frame has a first portion, a second portion and a third portion connecting the first portion and the second portion, wherein the first metal layer is not provided on the third portion. After a wire bonding step and an encapsulating step are conducted, a second metal layer is selectively plated on the first portions and the second portions of the leads and the die pads exposed from the bottom of the molded product. Then, the third portion of each lead is selectively etched away such that the first portion and the second portion are electrically isolated from each other. Finally, a singulation step is conducted to complete the process. The present invention further provides a new lead frame design.

A singulation method comprising: (a) providing a molded product including semiconductor chips attached and electrically coupled to an upper surface of a lead frame wherein a lower surface of the lead frame is exposed from the bottom of the molded product, the lead frame including a plurality of units in an array arrangement and cutting streets between the units, each unit having a die pad and leads arranged at the periphery of the die pad, a first metal layer formed on the entire lower surface of the lead frame except the cutting streets; (b) etching the lower surface of the lead frame with the first metal layer as mask such that the cutting streets are etched away to form a plurality of grooves; and (c) cutting the etched molded product along the grooves to obtain the leadless semiconductor packages.

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Paju-si, South Korea

Sangbae Park