Samsung Electronics Co., Ltd.

Skhynix Inc.

Industry-academic Cooperation Foundation

Sang-Yeon Kim

In-Seok Yeo

Ki-Sun Kim

Dae-Hong Ko

Myung-jong Kim

Mann-Ho Cho

Hyun-Chul Sohn

A memory controller includes a plurality of ports coupled with a host device and a plurality of channels coupled with a memory device. The memory controller also includes an arbiter receiving a first address received through the plurality of ports to output the first address; a mapping table storage block, including a plurality of address mapping tables, selecting an address mapping table, corresponding to the first address, among the plurality of address mapping tables and outputting the selected address mapping table as a variable address mapping table; an address mapping block mapping the first address to a second address according to the variable address mapping table, and a fixed address mapping table; and a scheduler outputting the second address to the channels. The plurality of address mapping tables may employ different methods of mapping one or more first bits of the first address to the second address.

Memory controller and system including variable address mapping tables and a fixed address mapping table

Example methods and example embodiments include methods of fabricating semiconductor devices and semiconductor devices fabricated by the same. Example fabricating methods include forming a first nanowire, oxidizing the first nanowire to form a first nanostructure including a first insulator and a second nanowire, and oxidizing the second nanowire to form a second nanostructure including a second insulator and nanodots. Example semiconductor devices include nanostructures including nanodots and nanostructures providing storage nodes in memory devices.

Methods of fabricating semiconductor devices and semiconductor devices fabricated by the same

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Seoul, South Korea

Sang-Yeon Kim