Samsung Electronics Co., Ltd.

Sang-Yeol Kang

Youn-soo Kim

Jae-hyoung Choi

Jae-Soon Lim

Kyu-Ho Cho

Min-Young Park

Ki-Vin Im

Cha-Young Yoo

Suk-Jin Chung

Hideki Horii

Han-jin Lim

Jong-Cheol Lee

Hyeong-Geun An

Eun-ae Chung

Hoon-Sang Choi

Eun-Sun Kim

Kyoo-Ho Jung

Hyo-Sik Mun

Dong-Chan Kim

Young-Lim Park

Wan-don Kim

Hyung-suk Jung

Se-hoon Oh

Young-Geun Park

Jin-Su Lee

Bong-hyun Kim

Jong-Bom Seo

Sun-Min Moon

Jong-cheol Lee

Jun-goo Kang

Wook-Yeol Yi

Jae-hyun Yeo

Ki-vin Lim

Hoon-sang Choi

Chang-Mu An

Youn-Soo Kim

A capacitor includes a lower electrode including a first metal material and having a first crystal size in a range of a few nanometers, a dielectric layer covering the lower electrode and having a second crystal size that is a value of a crystal expansion ratio times the first crystal size and an upper electrode including a second metal material and covering the dielectric layer. The upper electrode has a third crystal size smaller than the second crystal size.

Capacitor structure and semiconductor devices having the same

Capacitor structure

A method of manufacturing a semiconductor device includes forming a preliminary lower electrode layer on a substrate, the preliminary lower electrode layer including a niobium oxide; converting at least a portion of the preliminary lower electrode layer to a first lower electrode layer comprising a niobium nitride by performing a nitridation process on the preliminary lower electrode layer; forming a dielectric layer on the first lower electrode layer; and forming an upper electrode on the dielectric layer.

Semiconductor devices and method of manufacturing the same

A semiconductor device includes a first electrode on a substrate, a second electrode on the substrate, a dielectric layer structure between the first electrode and the second electrode, and a crystallization inducing layer between the dielectric layer structure and the first electrode. The dielectric layer structure includes a first dielectric layer including a first dielectric material and a second dielectric layer on the first dielectric layer and including a second dielectric material.

Semiconductor devices

A semiconductor device having a capacitor includes a substrate which has a transistor, a first insulating pattern which is formed on the substrate and does not overlap a first contact node formed in the substrate, a second insulating pattern which is formed on the substrate, does not overlap a second contact node formed in the substrate, and is separated from the first insulating pattern, a first lower electrode which is formed on part of the substrate and sidewalls of the first insulating pattern, a second lower electrode which is formed on part of the substrate and sidewalls of the second insulating pattern, a dielectric layer pattern which is formed on the first lower electrode and the second lower electrode, and an upper electrode which is formed on the dielectric layer pattern. Related fabrication methods are also discussed.

Semiconductor device having capacitor and method of fabricating the semiconductor device

To form a dielectric layer, an organometallic precursor is adsorbed on a substrate loaded into a process chamber. The organometallic precursor includes a central metal and ligands bound to the central metal. An inactive oxidant is provided onto the substrate. The inactive oxidant is reactive with the organometallic precursor. An active oxidant is also provided onto the substrate. The active oxidant has a higher reactivity than that of the inactive oxidant.

Methods of forming dielectric layers and methods of manufacturing semiconductor devices using the same

A method of fabricating semiconductor devices may include forming a mold structure on a lower layer, the mold structure including an etch stop layer doped at a first impurity concentration, a lower mold layer doped at a second impurity concentration, and an undoped upper mold layer. The method may include forming a trench exposing the lower layer in the mold structure using dry etching, extending a width of the trench in the etch stop layer using wet etching, and forming a first conductive pattern in the extended width trench, wherein an etch rate of the etch stop layer with respect to the dry etching may be smaller than an etch rate of the lower mold layer with respect to the dry etching, and an etch rate of the etch stop layer with respect to the wet etching may be proportional to the first impurity concentration.

Methods of fabricating memory devices using wet etching and dry etching

Methods of fabricating a semiconductor device include forming a deposited film on a semiconductor substrate in a process chamber by repeatedly forming unit layers on the semiconductor substrate. The unit layer is formed by forming a preliminary unit layer on the semiconductor substrate by supplying a process material including a precursor material and film-control material into the process chamber, purging the process chamber, forming a unit layer from the preliminary unit layer, and again purging the process chamber. The precursor material includes a central atom and a ligand bonded to the central atom, and the film-control material includes a hydride of the ligand.

Method of fabricating semiconductor device

A method of forming an oxide layer. The method includes: forming a layer of reaction-inhibiting functional groups on a surface of a substrate; forming a layer of precursors of a metal or a semiconductor on the layer of the reaction-inhibiting functional groups; and oxidizing the precursors of the metal or the semiconductor in order to obtain a layer of a metal oxide or a semiconductor oxide. According to the method, an oxide layer having a high thickness uniformity may be formed and a semiconductor device having excellent electrical characteristics may be manufactured.

Method of forming an oxide layer and method of manufacturing semiconductor device including the oxide layer

A semiconductor device having a dielectric layer with improved electrical characteristics and associated methods, the semiconductor device including a lower metal layer, a dielectric layer, and an upper metal layer sequentially disposed on a semiconductor substrate and an insertion layer disposed between the dielectric layer and at least one of the lower metal layer and the upper metal layer, wherein the dielectric layer includes a metal oxide film and the insertion layer includes a metallic material film.

Method of fabricating semiconductor device having dielectric layer with improved electrical characteristics

A method of forming a metal thin film can reduce leakage current while improving electric properties by improving step coverage of a device. The method of forming a metal thin film includes supplying a metal precursor including chlorine, purging byproducts produced after the supplying of the metal precursor by injecting a purge gas, supplying a reactant to allow the reactant and the metal precursor to react with each other to form a thin film layer, and purging the byproducts produced after the reaction by injecting a purge gas, wherein before the supplying of the metal precursor, the method further includes supplying a reactant to be adsorbed on a treated product.

ALD method of forming thin film comprising a metal

A capacitor includes a substrate, a plurality of first storage electrodes, a plurality of second storage electrodes, a first supporting layer pattern, a dielectric layer and a plate electrode. A plurality of contact pads is formed I the substrate. The first storage electrodes are arranged along lines parallel with a first direction and electrically connected to the contact pads, respectively. The second storage electrodes are respectively stacked on the first storage electrodes. The first supporting layer pattern extends in a direction parallel with the first direction between adjacent second storage electrodes and makes contact with the adjacent second storage electrodes to support the second storage electrodes. The dielectric layer is formed on the first and second storage electrodes. The plate electrode is formed on the dielectric layer.

Capacitor

A semiconductor device including a multilayer dielectric film and a method for fabricating the semiconductor device are disclosed. The multilayer dielectric film includes a type-one dielectric film having a tetragonal crystalline structure, wherein the type-one dielectric film comprises a first substance. The multilayer dielectric film also comprises a type-two dielectric film also having a tetragonal crystalline structure, wherein the type-two dielectric film comprises a second substance different from the first substance and a dielectric constant of the type-two dielectric film is greater than a dielectric constant of the type-one dielectric film.

Semiconductor device comprising multilayer dielectric film and related method

A phase changeable memory cell array region includes a lower interlayer insulating layer disposed on a semiconductor substrate. The region also includes a plurality of conductive plugs disposed through the lower interlayer insulating layer. The region also includes a phase changeable material pattern operably disposed on the lower interlayer insulating layer, the phase changeable pattern covering at least two of the plurality of conductive plugs, wherein the phase changeable material pattern includes a plurality of first regions in contact with one or more of the plurality of conductive plugs and at least one second region interposed between the plurality of the first regions, wherein the at least one second region has a lower thermal conductivity than the plurality of first regions. The phase changeable memory cell array region also includes an upper interlayer insulating layer covering at least one of the phase changeable material pattern and the lower interlayer insulating layer. The region also includes conductive patterns disposed through the upper interlayer insulating layer and electrically connected to a plurality of predetermined regions of the plurality of first regions.

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Seoul, South Korea

Sang-Yeol Kang