Samsung Electronics Co., Ltd.

Sang-wan Nam

Yohan Lee

Sangyong Yoon

Ji-Ho Cho

Dae-Han Kim

Jiho Cho

Eunhyang Park

Sang-won Park

Kookhyun Cho

Jae-hoon Choi

A memory package includes a printed circuit board, a first memory device that is stacked on the printed circuit board, and a second memory device stacked on the first memory device. The first memory device includes a first one-time programmable (OTP) block, the second memory device includes a second OTP block different from the first OTP block, and a horizontal distance from one side of the first memory device to the first OTP block is different from a horizontal distance from one side of the second memory device to the second OTP block.

Memory device including one-time programmable block and operation method thereof

A NOR flash memory is disclosed including a memory cell, sense amplifier output driver, and control circuit. A sense period for a sense operation performed by the sense amplifier is made synchronous with a clock signal so as to avoid power supply or ground signal noise generated by operation of the output driver.

NOR flash memory and related read method

A sense amplifier of a flash memory device maintains a bit line precharge level before a memory cell is sensed. The sense amplifier maintains the voltage of a bias signal sufficiently high using a second precharging circuit in a precharging operation to stably maintain the bit line precharge level set by a first precharging circuit. Accordingly, the sense amplifier can correctly sense an OFF cell using the stabilized bit line precharge voltage. Related methods and memory devices are also disclosed.

Sense amplifiers including multiple precharge circuits and associated memory devices

Growing community of inventors

Suwon-si, South Korea

Sang-wan Nam