Samsung Electronics Co., Ltd.

Sang-Uk Kim

Tae-Hun Kim

Woo-sup Han

Heung-Kyu Kwon

Sunchul Kim

Ki Wook Jung

Jinkyeong Seol

Byoung Wook Jang

Han-Shin Youn

Jong-Seo Park

Woo-Sup Han

Hye-Suk Park

A semiconductor package includes: a package substrate; a first re-distribution layer disposed on the package substrate; a second re-distribution layer disposed between the package substrate and the first re-distribution layer; a connection substrate interposed between the first re-distribution layer and the second re-distribution layer, wherein a connection hole penetrates the connection substrate; a first semiconductor chip mounted on a first surface of the first re-distribution layer; a first connection chip mounted on a second surface, opposite to the first surface, of the first re-distribution layer and disposed in the connection hole; a second connection chip mounted on a first surface of the second re-distribution layer and disposed in the connection hole; and a first lower semiconductor chip mounted on a second surface, opposite to the first surface, of the second re-distribution layer.

Semiconductor package including a redistribution substrate and a method of fabricating the same

A semiconductor package includes: a substrate; a first semiconductor chip disposed on the substrate; a capacitor disposed on the substrate and spaced apart from the first semiconductor chip in a first direction; an insulating layer disposed on the substrate and covering the capacitor; a first heat conductive layer at least partially surrounding side walls of the first semiconductor chip and disposed on the insulating layer, wherein the first heat conductive layer is in contact with the side walls of the first semiconductor chip, and wherein the first heat conductive layer includes a first material that is a conductive material; and a second heat conductive layer disposed on the first heat conductive layer, wherein the second heat conductive layer is in contact with the first heat conductive layer, wherein the second heat conductive layer includes a second material that is a non-conductive material.

Semiconductor package

A semiconductor package includes a first redistribution substrate, a connection substrate on the first redistribution substrate and having a first opening and a second opening that penetrate the connection substrate, a semiconductor chip on the first redistribution substrate and in the first opening of the connection substrate, a chip module on the first redistribution substrate and in the second opening of the connection substrate, and a molding layer that covers the semiconductor chip, the chip module, and the connection substrate. The chip module includes an inner substrate and a first passive device on the inner substrate. In the second opening, the molding layer covers the first passive device on the inner substrate.

Semiconductor package and method of fabricating the same

Disclosed are semiconductor packages and methods of fabricating the same. The semiconductor package includes a first semiconductor chip on a first substrate, a first molding layer covering a sidewall of the first semiconductor chip and including at least two guide holes that expose the first substrate and are spaced apart from each other in a periphery of the first substrate, a second substrate on the first molding layer, a connection terminal between the first substrate and the second substrates and connecting the first and second substrates to each other, and an alignment structure that extends from a bottom surface of the second substrate into each of the at least two guide holes of the first molding layer. A height of the alignment structure is greater than a height of the first molding layer and the first semiconductor chip.

A semiconductor package and a method manufacturing the same are disclosed. At least one semiconductor chip is mounted on a package substrate. An insulative mold layer is formed at sides of the semiconductor chip having at least one recess in a region in which conductive connection members are formed, the recess defining one or more protrusions within the mold layer. An interposer is positioned on the protrusions with the conductive connection members connecting and providing electrical connections between conductive pads on the upper surface of the package and conductive pads on the lower surface of the package substrate. The protrusions may position the interposer in the vertical direction by defining the vertical spacing between the lower surface of the interposer and the upper surface of the package substrate. The protrusions may also position the interposer in one or more horizontal directions and/or prevent substantial movement during connecting of the interposer to the package substrate. An under-fill resin layer may be injected into remaining space between the interposer and the package substrate.

Semiconductor packages and methods of manufacturing same

A semiconductor package device includes a lower package, an interposer disposed on the lower package and including a ground layer and at least one opening, and an upper package on the interposer. The lower package includes a first package substrate, a first semiconductor chip on the first package substrate, and a first molding compound layer on the first package substrate. The upper package includes a second package substrate and at least one upper semiconductor chip on the second package substrate. A heat transfer member includes a first portion disposed between the interposer and the upper package, a second portion disposed in the at least one opening of the interposer, and a third portion disposed between the interposer and the lower package.

Semiconductor package devices including interposer openings for heat transfer member

A chip stack package may include a substrate, semiconductor chips, a molding member and a controller. The substrate may have a wiring pattern. The semiconductor chips may be stacked on a first surface of the substrate. Further, the semiconductor chips may be electrically connected to the wiring pattern. The molding member may be formed on the first substrate covering the semiconductor chips. The controller may be arranged on a second surface of the substrate. The controller may be electrically connected to the wiring pattern. The controller may have a selection function for selecting operable semiconductor chip(s) among the semiconductor chips.

Stack package, a method of manufacturing the stack package, and a digital device having the stack package

A semiconductor package has a base, a chip attached to the base, a flexible connection plate mounted on and electrically connecting the chip and the base, and an encapsulant encapsulating the chip and the flexible connection plate on the base. The flexible connection plate includes a film and a layer of leads integrated with the film. Inner ends of the leads located at a central portion of the flexible connection plate are connected to contact pads of the chip, and outer ends of the leads located at an outer peripheral portion of the flexible connection plate are connected to leads of the base.

Semiconductor package having flexible lead connection plate for electrically connecting base and chip

A semiconductor packaging mold includes first and second mold bodies, a cavity defined by the first and second mold bodies to provide a space for molding a semiconductor package, and a resin bleed preventing formation on a cavity surface of one of the first and second mold bodies to suppress resin bleeding.

Semiconductor packaging mold and method of manufacturing semiconductor package using the same

The moisturizing device of refrigerator wherein the defrosted water used for moisturization is to be automatically changed with fresh water always so that fresh defrosted water may be supplied for moisturization. The structure of the hopper shaped water collection pail is formed which collects the defrosted water used for moisturization dividedly in small units and makes the dividedly collected water in small units over flow and drained successively and continually, resulting always a fixed amount of defrosted water collected in it.

Growing community of inventors

Cheonan-si, South Korea

Sang-Uk Kim