Hynix Semiconductor Inc.

Sang-Tae Ahn

Seok-Pyo Song

Dong-Sun Sheen

Jong-Han Shin

Eun-Jeong Kim

A method for fabricating a semiconductor device includes forming a plurality of first active pillars by etching a substrate using a hard mask layer as an etching barrier, forming a gate conductive layer surrounding sidewalls of the first active pillars and the hard mask layer, forming a word line conductive layer filling gaps defined by the gate conductive layer, forming word lines and vertical gates by simultaneously removing portions of the word line conductive layer and the gate conductive layer on the sidewalls of the hard mask layer, forming an inter-layer dielectric layer filling gaps formed by removing the word line conductive layer and the gate conductive layer, exposing surfaces of the first active pillars by removing the hard mask layer, and growing second active pillars over the first active pillars.

Method for fabricating semiconductor device with vertical transistor having a second active pillar formed over a first active pillar

Disclosed is a semiconductor device with a flowable insulation layer formed on a capacitor and a method for fabricating the same. Particularly, the semiconductor device includes: a capacitor formed on a predetermined portion of a substrate; an insulation layer formed by stacking a flowable insulation layer and an undoped silicate glass layer on a resulting substrate structure including the substrate and the capacitor; and a metal interconnection line formed on the insulation layer. The method includes the steps of: forming a capacitor on a predetermined portion of a substrate; forming an insulation layer by stacking a flowable insulation layer and an undoped silicate glass layer on a resulting substrate structure including the substrate and the capacitor; and forming a metal interconnection line on the insulation layer.

Semiconductor device with flowable insulation layer formed on capacitor and method for fabricating the same

The present invention relates to a method for isolating semiconductor devices. The method includes the steps of: forming a patterned pad nitride layer pattern to open at least one isolation region on the substrate; forming a first trench and a second trench by etching the exposed substrate; depositing a first oxide layer to fill the first trench by performing an atomic layer deposition (ALD) method; etching a portion of the first oxide layer which is filled into the wide trench; and depositing a second oxide layer by performing a deposition method.

Method for isolating semiconductor devices with use of shallow trench isolation method

A method for forming a flowable dielectric layer using a barrier layer on sidewalls of patterned flowable dielectrics, thereby preventing a bridge phenomenon between adjacent contact plugs. The method includes steps of: forming patterns on a semiconductor substrate, wherein narrow and deep gaps are formed therebetween; forming a flowable dielectric layer so as to fill the gaps between the patterns; carrying out an annealing process for densifying the flowable dielectric layer and removing moisture therein; forming contact holes by selectively etching the flowable dielectric layer so as to expose predetermined portions of the semiconductor substrate; forming a barrier layer on sidewalls of the contact holes for preventing micro-pores in the flowable dielectric layer; carrying out a cleaning process in order to remove native oxides and defects on the semiconductor substrate; and forming contact plugs by filling a conductive material into the contact plugs.

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Gyeonggi-do, South Korea

Sang-Tae Ahn