Vlsi Technology, Inc.

Sang S Lee

Louis H Liang

William M Loh

Chin-Ching Huang

George Fujimoto

Ramachandra A Rao

Fernand N Forcier, Jr

Che-Yuan Chen

Ahmad B Hamzehdoost

Young I Kwon

William K Shu

Richard L Groover

D Douglas Baumann

Peter Chi-Ming Ho

An apparatus and method for balancing the flow of molten molding compound above and below an integrated circuit assembly during encapsulation of the assembly. An annular shaped layer of material is placed over the bonding fingers of a leadframe such that the annular shaped layer of material peripherally surrounds the centrally located opening in the leadframe. The annular shaped layer of material has sufficient width and thickness to slow the flow of molten molding material over the top surface of the integrated circuit assembly to the same speed as the flow of molten material under the bottom surface of the integrated circuit package assembly. In so doing, the present invention reduces the formation of blowholes or voids in encapsulated integrated circuit packages.

Mold flow regulating dam ring

Methods and apparatuses for encapsulating thermally enhanced (TE) and electrically and thermally enhanced (ETE) integrated circuit assemblies that include bulky thermally conductive heat sinks so as to prevent the formation of pinholes and IC warpage without adding bulk or additional structures. The assemblies are repositioned, through offset in the bonding fingers of the leadframe, so that the rates of mold flow in the two halves of the mold cavity are substantially balanced. The repositioning of the assemblies also substantially balances the amount of mold material in the mold halves to prevent warpage when the IC cools down.

Methods and apparatus for manufacturing encapsulated integrated circuits

A method is described for creating an inductor in the package for an integrated circuit. The inductor is formed by utilizing one or more of the bond leads as the core of the inductor and by winding a series of coils about the core in connection either with the bond pads of the integrated circuit itself or to other bond leads for connection outside the integrated circuit chip.

Method for creating on-package inductors for use with integrated circuits

Encapsulated thermally enhanced (TE) and electrically and thermally enhanced (ETE) integrated circuit assemblies that include bulky thermally conductive heat sinks are disclosed. The integrated circuit assemblies are configured to prevent the formation of pinholes and IC package warpage without adding bulk or additional structures. The assemblies are repositioned, through an offset in the bonding fingers of the leadframe, so that the rates of mold flow in the two halves of the mold cavity are substantially balanced. The repositioning of the assemblies also substantially balances the amount of mold material in the mold halves, which prevents warpage in a finished IC package.

Packaging assemblies for encapsulated integrated circuit devices

A multi-layered, high performance integrated circuit package is disclosed having a number of design features which increase the performance and manufacturability of the integrated circuit package, and reduce the effects of parasitic noise generated within the package. The metallic layers connecting contact fingers formed on ledges around the periphery of a die cavity area, to their respective package pins are organized such that a ground metallic layer is interposed between each pair of input/output signal metallic layers, and each input/output signal metallic layer is sandwiched between a pair of metallic layers wherein one layer of the pair is connected to a voltage supply and the other layer of the pair is connected to a corresponding ground reference. On one of the ledges, contact fingers corresponding to a first set of input/output signals are evenly dispersed around contact fingers corresponding to the ground reference, and on another one of the ledges, contact fingers corresponding to a second set of input/output signals are evenly dispersed around contact fingers corresponding to the voltage supply. On a bottom surface of the integrated circuit package a plurality of pins are arranged in a pin-grid-array, and pins corresponding to the voltage supply and ground reference are placed in the four outer corners of the bottom surface, so as to minimize parasitic noise generated on the voltage and ground lines connected to these pins, by active circuitry of the packaged integrated circuit.

Multi-layered, integrated circuit package having reduced parasitic noise

An integrated-circuit package assembly includes a separate silicon substrate to which an integrated-circuit die is fixed. The separate silicon substrate serves as a heat spreader for the integrated-circuit die. The separate silicon substrate to which the integrated-circuit die is fixed is packaged in either a molded package body or a cavity-type package body. For the molded package body, the package body is molded around a leadframe, the integrated-circuit die, and the separate silicon substrate to which the integrated-circuit die is fixed. For a molded package body, the leadframe has bonding fingers formed at the inward ends thereof which are attached to the separate silicon substrate or the lead frame may have a die-attach pad to which is fixed the separate silicon substrate. For the cavity-type package, the package body includes a mounting surface formed adjacent to a cavity formed therein and the mounting surface has the separate silicon substrate fixed to the top surface thereof. The cavity-type body is formed of a ceramic material or as a multi-layer printed-circuit board. One or more interposer areas are formed on the top surface of the silicon substrate for attachment of connection wires from the integrated-circuit die or the leadframe. A portion of the interposer can extend between the integrated circuit die and the top surface of the silicon substrate to accommodate integrated-circuit dies of various sizes. The interposer includes a layer of oxide formed on the surface of the silicon substrate, which layer of oxide is covered with a layer of conductive material.

Electrically and thermally enhanced package using a separate silicon

An encapsulated electrically and thermally enhanced integrated circuit is disclosed. An integrated-circuit die is attached to a thermally conductive, electrically-insulated substrate. A lead frame having inwardly-extending bonding fingers has the bottom sides thereof attached to the top of the substrate. A contiguous layer of insulating material is bonded to the top sides of the bonding fingers, such that the layer of insulating material peripherally surrounds the integrated-circuit die. A conductive layer of material is then bonded to the top of the insulating layer. A second layer of insulating material followed by a second conductive layer may be bonded on top of the first conductive layer. Electrical connections are made from the integrated-circuit die to the conductive layers surrounding the die. The device is then encapsulated in a plastic material.

Method of making electrically and thermally enhanced integrated-circuit

A method of forming a molded plastic package having an integrated heat sink, without forming mold 'flash' on an external surface of the integrated heat sink during the molding process, is described. The method generally follows conventional fabrication steps for molded plastic packages, except that a protective layer, preferably formed of a water or chemically soluble paste, or a high temperature adhesive tape, is applied to the external surface of the heat sink prior to the formation of the molded plastic package. The protective layer prevents mold 'flash' from forming between the external surface of the heat sink and an inner surface of the mold during the molding process, and after formation of the molded plastic package, acts to protect the external surface of the heat sink from scratches and/or contaminants. The protective layer is readily removable by either dissolving it in water, in a chemical, or peeling it off, depending upon whether the protective layer is formed of a water soluble paste, a chemically soluble paste, or a high temperature adhesive tape, respectively.

Method of forming molded plastic packages with integrated heat sinks

An integrated-circuit die attached to a thermally conductive substrate having surface variations formed into the surface of the thermally conductive substrate. A lead frame has inwardly-extending fingers, which are attached to the thermally conductive substrate. The integrated circuit die, lead frame, and substrate are enclosed within a mold cavity. The surface variations of the thermally conductive substrate provide for a more balanced flow of plastic material over the top and bottom of the substrate provide a molded package body substantially free of voids.

Plastic encapsulated integrated circuit package having an embedded

An improved packaging technique for packaging a thermally-enhanced, molded-plastic quad flat package (TE-QFP). An integrated-circuit die is attached to a thermally conductive, electrically-insulated substrate having a stepped area formed into the outer margins thereof. A lead frame has inwardly-extending fingers, which are attached to the stepped areas in the outer margins of the thermally conductive, electrically-insulated substrate. The stepped area centers the thermally conductive, electrically-insulated substrate and attached integrated-circuit die within the mold cavity so that the flow of plastic material is balanced over the top and bottom of the substrate to provide a molded package body substantially free of voids.

Design for encapsulation of thermally enhanced integrated circuits

A lead frame assembly characterized by alternating high and low wire loops which connect the attach pads of an integrated circuit die to the conductive fingers of the lead frame. The alternating loops reduce the likelihood that adjacent loops will short out due to twists in the wires or due to connecting wire 'sweep' caused by subsequent plastic encapsulation. A number of high loops can be attached before the formation of the first low loop or vice versa. Alternately, the high and low wire loops can be attached in an alternating fashion.

Lead frame assembly and method for wiring same

An integrated circuit package characterized by an interposer including a thin, flexible, planar insulator having a plurality of substantially radial traces provided on one side thereof. The other side of the insulator is attached to the die attach pad of a lead frame, and an integrated circuit die is attached within a die attach area of the assembly. A first set of wires couples bonding pads of the die to the traces, and a second set of wires couples the traces to bonding fingers of the lead frame. The bonding fingers, interposer, die, and both sets of wires are then encapsulated in plastic. The interposer can be advantageously manufactured in a tape automated bonding (TAB) process to provide a low cost, high performance, and versatile lead frame assembly.

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Sunnyvale, CA, United States of America

Sang S Lee