Hynix Semiconductor Inc.

Skhynix Inc.

Sang-Oh Lee

Jun-Hyeub Sun

Sung-Kwon Lee

Su-Young Kim

Uk Han Kim

Jong-Sik Bang

A method for fabricating a semiconductor device includes forming an etching target layer over a substrate including a first region and a second region; forming a hard mask layer over the etching target layer; forming a first etch mask over the hard mask layer, wherein the first etch mask includes a plurality of line patterns and a sacrificial spacer layer formed over the line patterns; forming a second etch mask over the first etch mask, wherein the second etch mask includes a mesh type pattern and a blocking pattern covering the second region; removing the sacrificial spacer layer; forming hard mask layer patterns having a plurality of holes by etching the hard mask layer using the second etch mask and the first etch mask; and forming a plurality of hole patterns in the first region by etching the etching target layer using the hard mask layer patterns.

Mask pattern for hole patterning and method for fabricating semiconductor device using the same

A method for fabricating a semiconductor device includes forming a first dielectric structure over a second region of a substrate to expose a first region of the substrate, forming a barrier layer over an entire surface including the first dielectric structure, forming a second dielectric structure over the barrier layer in the first region, forming first open parts and second open parts in the first region and the second region, respectively, by etching the second dielectric structure, the barrier layer and the first dielectric structure, forming first conductive patterns filled in the first open parts and second conductive patterns filled in the second open parts, forming a protective layer to cover the second region, and removing the second dielectric structure.

Semiconductor device with multi-layered storage node and method for fabricating the same

A method for fabricating a semiconductor device includes forming an isolation layer over a substrate, forming a plurality of open regions exposing the substrate by selectively etching the isolation layer, performing a surface treatment over the isolation layer, expanding the open regions by removing the surface-treated portion of the isolation layer, and forming a conductive layer in the expanded open regions.

Method for fabricating semiconductor device having expanded critical dimension by performining surface treatment

A method for fabricating a semiconductor device is provided, the method includes forming a double trench including a first trench and a second trench formed below the first trench and having surfaces covered with insulation layers, and removing portions of the insulation layers to form a side contact exposing one sidewall of the second trench.

Method for fabricating side contact in semiconductor device using double trench process

A method for fabricating a semiconductor device includes forming a plurality of active regions, each having a first sidewall and a second sidewall, by etching a semiconductor substrate, forming an insulation layer on the first sidewall and the second sidewall, forming an etch stop layer filling a portion of each gap between the active regions, forming a recess exposing the insulation layer formed on any one sidewall from among the first sidewall and the second sidewall, and forming a side contact exposing a portion of any one sidewall from among the first sidewall and the second sidewall by selectively removing a portion of the insulation layer.

Method for forming side contact in semiconductor device through self-aligned damascene process

A method for fabricating a semiconductor device includes etching a semiconductor substrate using a hard mask layer as a barrier to form a trench defining a plurality of active regions, forming a gap-fill layer to gap-fill a portion of the inside of the trench so that the hard mask layer becomes a protrusion, forming spacers covering both sides of the protrusion, removing one of the spacers using a doped etch barrier as an etch barrier, and etching the gap-fill layer using a remaining spacer as an etch barrier to form a side trench exposing one side of the active region.

Method for fabricating semiconductor device

A method for forming contact holes in a semiconductor device includes forming a hard mask layer over an etch target layer, forming a first line pattern in the hard mask layer by etching a portion of the hard mask layer through a primary etch process, forming a second line pattern crossing the first line pattern by etching the hard mask layer including the first line pattern through a secondary etch process, and etching the etch target layer by using the hard mask layer including the first line pattern and the second line pattern as an etch barrier.

Method for forming contact holes in semiconductor device

A method for fabricating a capacitor in a semiconductor device includes forming a stack structure providing a plurality of open regions, the stack structure including an insulation layer and a hard mask pattern, forming a conductive layer over the stack structure and in the open regions, etching a portion of the conductive layer formed outside the open regions to form bottom electrodes in the open regions, removing the hard mask pattern, and etching upper portions of the bottom electrodes that are exposed after the hard mask pattern is removed.

Method for fabricating capacitor in semiconductor device

A method for forming a contact hole of a semiconductor device includes: forming a lower pattern over a substrate; forming a spin-on-glass (SOG) layer over the lower pattern; performing a first curing process on the SOG layer; forming an opening exposing a portion of the SOG layer; performing a second curing process on the SOG layer corresponding to a lower portion of the opening; and forming a contact hole exposing the lower pattern.

Growing community of inventors

Gyeonggi-do, South Korea

Sang-Oh Lee