Samsung Electronics Co., Ltd.

Sejong University

Sang Oak Woo

Seok Yoon Jung

Sung Jin Son

Kwon Taek Kwon

Shi Hwa Lee

Woo Chan Park

Kyoung June Min

Jong Won Lee

Young Chan Kim

Youngsik Kim

Jae Ho Shin

Min Soo Kim

Hee Seok Kim

Young Sik Kim

Won Jong Lee

Chang Hyun Lee

Kang Eun Lee

Chan Min Park

Dong Soo Kang

Chang Yong Son

Suk Jin Kim

Duk Ki Hong

Derek Lentz

Gyeong Ja Jang

Jeong Wook Kim

Jeong Soo Park

Jun Bum Park

Vladislav Y Aranov

Jeong Ae Park

Young Duke Seo

Pavel O Smirnov

Sergey Y Belyaev

Myung June Jung

Kyoung Jun Min

An electronic system includes; a host providing a command and source data having a source data structure, a computing resource device operating in relation to destination data having a destination data structure different from the source data structure, and a storage device. The storage device receives the command from the host and includes a storage medium storing the source data, and a data reorganizing unit converting the source data into reorganized source data, wherein the storage device outputs the reorganized source data to the computing resource device as destination data.

Storage device reorganizing data and related operating method

An operating method of a computational storage device includes: setting a first computing namespace, including a first queue and a first accelerator and having a first value as its first ID, per instructions from a first host; setting a second computing namespace, including a second queue and a second accelerator and having a second value as its first ID, per instructions from a second host; loading a first program from the first host in the first computing namespace; loading a second program from the second host in the second computing namespace; setting a second ID of the first computing namespace to a third value based on an ID of the first program per instructions to activate the first program; and setting the second ID of the second computing namespace to a fourth value based on an ID of the second program per instructions to activate the second program.

Computational storage device and method of operating the same

An apparatus and method for processing a primitive in a three-dimensional (3D) graphics rendering system is provided. The primitive processing apparatus may discard a primitive or store the primitive in a memory, depending on whether a sampling point overlapping the primitive is present among sampling points in a pixel area.

Apparatus and method for processing primitive in three-dimensional (3D) graphics rendering system

A rendering system and method. The rendering system may perform rendering using a rendering context stored in an internal memory. When a rendering context to be used is not available in the internal memory, the rendering system may load the rendering context to be used from an external memory into the internal memory. When an insufficient amount of storage space is available in the internal memory, storage space may be secured by selectively deleting a rendering context from the internal memory, and a requested rendering context stored in the external memory may be loaded into the internal memory.

Rendering system and method

A non-blocking texture cache memory for a texture mapping pipeline and an operation method of the non-blocking texture cache memory may include: a retry buffer configured to temporarily store result data according to a hit pipeline or a miss pipeline; a retry buffer lookup unit configured to look up the retry buffer in response to a texture request transferred from a processor; a verification unit configured to verify whether result data corresponding to the texture request is stored in the retry buffer as the lookup result; and an output control unit configured to output the stored result data to the processor when the result data corresponding to the texture request is stored as the verification result.

Texture cache memory system of non-blocking for texture mapping pipeline and operation method of texture cache memory

Fragment merging is performed on a draw call basis. One application is for quad merging. Primitives of the same draw call have many common attributes, such as a graphics state, which facilitates merging of quad fragments. Partially covered quad fragments of the same draw call are considered for possible merging and at least one merge test performed. The merge test may include error tests such as a level of detail error test, interpolated depth, and an interpolation error test.

Elimination of minimal use threads via quad merging

A method for tile-based rendering may include verifying a size of a memory available in an apparatus for rendering, and determining a number of buffers required for performing a rendering based on graphics data input, and may further include determining a size of a tile to be used for performing the rendering based on the determined number of buffers and the size of the memory available.

Method and apparatus for tile-based rendering

An apparatus and method for non-blocking execution of a static scheduled processor, the apparatus including a processor to process at least one operation using transferred input data, and an input buffer used to transfer the input data to the processor, and store a result of processing the at least one operation, wherein the processor may include at least one functional unit (FU) to execute the at least one operation, and the at least one FU may process the transferred input data using at least one of a regular latency operation and an irregular latency operation.

Apparatus and method for non-blocking execution of static scheduled processor

A method and apparatus for configuring dynamic data are provided. A compilation apparatus may select a data format showing an optimum performance when a binary code is executed, from among a plurality of data formats supported by an execution apparatus used to execute a binary code, and may generate a binary code that uses the selected data format. The execution apparatus may execute a binary code provided by the compilation apparatus.

Method and apparatus for dynamic data configuration

A method and apparatus for providing shared caches. A cache memory system may be operated in a first mode or a second mode. When the cache memory system is operated in the first mode, a first cache and a second cache of the cache memory system may be operated independently. When the cache memory system is operated in the second mode, the first cache and the second cache may be shared. In the second mode, at least one bit may overlap tag bits and set index bits among bits of a memory address.

Method and apparatus for providing shared caches

A cache memory system and a caching method for a tile-based rendering may be provided. Each of cache lines in the cache memory system may include delayed-replacement information. The delayed-replacement information may indicate whether texture data referred to at a position of an edge of a tile is included in a cache line. When a cache line corresponding to an access-requested address is absent in the cache memory system, the cache memory system may select and remove a cache line to be removed from an associative cache unit, based on delayed-replacement information.

Cache memory system for tile based rendering and caching method thereof

An apparatus and method for tile binning are provided. The tile binning apparatus may include a determination unit to determine whether a triangle obtained as a result of geometric processing includes an abnormal edge, an overlap test unit to perform an overlap test with respect to each edge of the triangle when the abnormal edge is absent from the triangle, and to sort three vertices of the triangle according to Y-axis values and perform the overlap test with respect to each edge of the triangle based on a sorting result when the triangle includes the abnormal edge, and a bin array update unit to update a bin array based on an overlap test result.

Apparatus and method for tile binning

A method and apparatus for graphic processing using multi-threading includes at least one context task, mediation task, and control task executed by a processor. The at least one context task sequentially generates graphic commands. The mediation task mediates processing of the graphic commands. The mediation task may process a particular graphic command on behalf of the at least one context task, and change a processing order of the graphic commands. The control task transmits the graphic commands to a graphic hardware.

Method and apparatus for graphic processing using multi-threading

Provided are a clipping apparatus and clipping method for a three-dimensional (3D) graphic rendering. The clipping apparatus may reset or convert a triangular object based on distance information of vertices configuring or comprising the triangular object where a perspective projection scheme is applied.

Apparatus and method for clipping for 3D graphic rendering

A tile-based rendering apparatus and method is provided. Vertex data sorted based on a tile unit may be stored in a scene buffer and be rendered. Among the stored vertex data, vertex data used several times for rendering may be temporarily stored in a memory or a cache. Vertex data having a probability of being read several times from the scene buffer may be temporarily stored in another memory.

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Anyang-si, South Korea

Sang Oak Woo