Intermolecular, Inc.

Lg Display Co., Ltd.

Guardian Glass, LLC

Other

Sang M Lee

Jeroen Van Duren

Minh Le

Haifan Liang

Sandeep Nijhawan

Wei Liu

Willem Den Boer

Guowen Ding

Yiwei Lu

Daniel Schweigert

Min-Cheol Kim

Seon-Mee Cho

Cesar Clavero

Woosup Shin

Teresa B Sapirman

Stuart Brinkley

Kwon-Sik Park

Philip Allan Kraus

Khaled Ahmed

Karl Anthony Littau

Zhi-Wen Sun

Youn-Gyoung Chang

Anh Duong

Jingang Su

Majid Gharghi

Yoon-Kyung Chang

Chulhoon Kim

An insulating glass (IG) window unit including first and second glass substrates that are spaced apart from each other. At least one of the glass substrate has a triple silver low-emissivity (low-E) coating on one major side thereof, and a dielectric coating for improving angular stability on the other major side thereof.

IG window unit having triple silver coating and dielectric coating on opposite sides of glass substrate

Embodiments described herein provide method for forming crystalline indium-gallium-zinc oxide (IGZO). A substrate is provided. A seed layer is formed above the substrate. The seed layer has a crystalline structure that is substantially dominant along the c-axis. An IGZO layer is formed above the seed layer. The seed layer may include zinc oxide. A stack of alternating seed layers and IGZO layers may be formed.

Methods for forming crystalline IGZO with a seed layer

A co-sputter technique is used to deposit In&#x2014;Ga&#x2014;Zn&#x2014;O films using PVD. The films are deposited in an atmosphere including both oxygen and argon. A heater setpoint of about 300 C results in a substrate temperature of about 165 C. One target includes an alloy of In, Ga, Zn, and O with an atomic ratio of In:Ga:Zn of about 1:1:1. The second target includes a compound of zinc oxide. The films exhibit the c-axis aligned crystalline (CAAC) phase in an as-deposited state, without the need of a subsequent anneal treatment.

Method to grow in-situ crystalline IGZO using co-sputtering targets

A gradient in the composition of at least one of the elements of a metal-based semiconductor layer is introduced as a function of depth through the layer. The gradient(s) influence the current density response of the device at different gate voltages. In some embodiments, the composition of an element (e.g. Ga) is greater at the interface between the metal-based semiconductor layer and the source/drain layers. The shape of the gradient profile is one of linear, stepped, parabolic, exponential, and the like.

Compositional graded IGZO thin film transistor

Embodiments described herein provide method for forming crystalline indium-gallium-zinc oxide (IGZO). A substrate is provided. An IGZO layer is formed above the substrate. The IGZO layer is annealed in an environment consisting essentially of nitrogen gas.

Methods for forming crystalline IGZO through annealing

In some embodiments, Cu&#x2014;In&#x2014;Ga precursor films are deposited by co-sputtering from multiple targets. Specifically, the co-sputtering method is used to form layers that include In. The co-sputtering reduces the tendency for the In component to agglomerate and results in smoother, more uniform films. In some embodiments, the Ga concentration in one or more target(s) is between about 25 atomic % and about 66 atomic %. The deposition may be performed in a batch or in-line deposition system. If an in-line deposition system is used, the movement of the substrates through the system may be continuous or may follow a 'stop and soak' method of substrate transport.

CIGS absorber formed by co-sputtered indium

Methods for HPC techniques are applied to the processing of site-isolated regions (SIR) on a substrate to form at least a portion of a TFT device used in display applications. The processing may be applied to at least one of gate dielectric deposition, gate dielectric patterning, metal-based semiconductor deposition, metal-based patterning, etch stop deposition, etch stop patterning, source/drain deposition, or source/drain patterning. The SIRs may be defined during the deposition process with uniform deposition within each SIR or the SIRs may be defined subsequent to the deposition of layers wherein the layers are deposited with a gradient in one or more properties across the substrate.

High Productivity Combinatorial material screening for stable, high-mobility non-silicon thin film transistors

Methods for HPC techniques are applied to the processing of site-isolated regions (SIR) on a substrate to form at least a portion of a TFT device used in display applications. The processing may be applied to at least one of gate dielectric deposition, gate dielectric patterning, metal-based semiconductor (e.g. ZnO, ZnSnO, ZnInO, or ZnGaO) deposition, metal-based semiconductor (e.g. ZnO, ZnSnO, ZnInO, or ZnGaO) patterning, etch stop deposition, etch stop patterning, source/drain deposition, or source/drain patterning. The SIRs may be defined during the deposition process with uniform deposition within each SIR or the SIRs may be defined subsequent to the deposition of layers wherein the layers are deposited with a gradient in one or more properties across the substrate.

High productivity combinatorial material screening for metal oxide films

Embodiments described herein provide methods for forming indium-gallium-zinc oxide (IGZO) devices. A substrate is provided. An IGZO layer is formed above the substrate. A copper-containing layer is formed above the IGZO layer. A wet etch process is performed on the copper-containing layer to form a source region and a drain region above the IGZO layer. The performing of the wet etch process on the copper-containing layer includes exposing the copper-containing layer to an etching solution including a peroxide compound and one of citric acid, formic acid, malonic acid, lactic acid, etidronic acid, phosphonic acid, or a combination thereof.

Methods for forming back-channel-etch devices with copper-based electrodes

Methods for HPC techniques are applied to the processing of site-isolated regions (SIR) on a substrate to form at least a portion of a TFT device used in display applications. The processing may be applied to at least one of gate electrode deposition, gate electrode patterning, gate dielectric deposition, gate dielectric patterning, metal-based semiconductor material (e.g. IGZO) deposition, metal-based semiconductor material (e.g. IGZO) patterning, etch stop deposition, etch stop patterning, source/drain deposition, source/drain patterning, passivation deposition, or passivation patterning. The SIRs may be defined during the deposition process with uniform deposition within each SIR or the SIRs may be defined subsequent to the deposition of layers wherein the layers are deposited with a gradient in one or more properties across the substrate.

High productivity combinatorial screening for stable metal oxide TFTs

A method for fabricating high efficiency CIGS solar cells including the deposition of Ga concentrations (Ga/(Ga+In)=0.25&#x2212;0.66) from sputtering targets containing Ga concentrations between about 25 atomic % and about 66 atomic %. Further, the method includes a high temperature selenization process integrated with a high temperature anneal process that results in high efficiency.

Method of fabricating high efficiency CIGS solar cells

A method for fabricating high efficiency CIGS solar cells including the deposition of Ga concentrations (Ga/(Ga+In)=0.25-0.66) from sputtering targets containing Ga concentrations between about 25 atomic % and about 66 atomic %. Further, the method includes a high temperature selenization process integrated with a high temperature anneal process that results in high efficiency.

A shoe washing device including a motor for driving a rotor onto which the shoes are directly mounted as by aligning the soles of the shoes parallel to the axis of rotation of the rotor. The shoes are affixed onto the rotor by using a clip, strap, cage, or other attachment means. The shoes are then rotated within the wash compartment into which a wash fluid is introduced in a wash cycle and removed following a wash cycle. An integrated drying component may allow air drying of the shoes during a final spin cycle.

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San Jose, CA, United States of America

Sang M Lee