Samsung Electronics Co., Ltd.

Samsung Electro-mechanics Co., Ltd.

Lg Electronics Inc.

Sang Kyun Lee

Won Jae Joo

Kwang Hee Lee

Tae Lim Choi

Sung Ho Lee

Chang Ryul Jung

Yeong Su Cho

Myung Sup Jung

Chang Ho Kim

Bae Kyun Kim

Yoon Sok Kang

Ki Tae Oh

Dong Sup Park

Jung Eun Noh

Jong Kug Seon

Hyun Chul Jung

Yeon Kyoung Lee

Yi Yeol Lyu

Dong Hyeok Choi

Dae Sung Wang

Ill Kyoo Park

Jong Hoon Chung

Tae Young Choi

Jae Young Choi

Kang Heon Hur

Hong Seok Min

Seong Jae Choi

Ki Yong Song

Jun Hyung Park

Jin Heong Yim

Seung Heon Han

Koon Seok Lee

Jin Sung Park

Wan Suk Yang

Kwan Hyeong Kim

Dong Soo Park

Chulhee Kim

Won Joo Kim

Il Hoon Ji

Dong Sook Sinn

Ji Sung Cho

Hyung Taik Im

Sun Mi Han

Seon Cheol Park

Woong Jeon

Sang Pyo Lee

Sung Soo Ryu

Dang Hyok Yoon

Tae Llm Choi

Chul Hee Kim

Yeon Kyung Lee

A chip-type electric double layer capacitor includes: a resin case having a housing space provided therein and formed of insulating resin; first and second external terminals inserted into the resin case by insert injection molding, each having a first portion exposed to an outer surface of the resin case for external contact and a second portion exposed to an inner surface of the housing space for internal contact; a sealing portion including a groove portion provided in the resin case along a circumference of at least one of the first and second external terminals and a resin filling the groove portion; and an electric double layer capacitor cell mounted in the housing space and electrically connected to the second portion of the first and second external terminals.

Chip-type electric double layer capacitor cell and method of manufacturing the same

A method of manufacturing a chip-type electric double layer capacitor, including: forming a lower case having an opened housing space and first and second external terminals buried therein, the first and second external terminals having first surfaces exposed to the housing space, respectively, and second surfaces exposed to an outer region of the lower case, respectively; mounting an electric double layer capacitor cell in the housing space such that the electric double layer capacitor cell is electrically connected to the first surfaces of the first and second external terminals exposed to the housing space; and mounting an upper cap on the lower case so as to cover the housing space.

Method of manufacturing chip-type electric double layer capacitor

Example embodiments herein relate to compositions useful in forming organic active patterns that may, in turn, be incorporated in organic memory devices. The compositions comprise N-containing conjugated electroconductive polymer(s), photoacid generator(s) and organic solvent(s) capable of dissolving suitable quantities of both the electroconductive polymer and the photoacid generator. Also disclosed are methods for patterning organic active layers formed using one or more of the compositions to produce organic active patterns, portions of which may be arranged between opposed electrodes to provide organic memory cells. The methods include directly exposing and developing the organic active layer to obtain fine patterns without the use of a separate masking pattern, for example, a photoresist pattern, thereby tending to simplify the fabrication process and reduce the associated costs.

Photosensitive compositions useful for forming active patterns, methods of forming such active patterns and organic memory devices incorporating such active patterns

Disclosed herein is a volatile negative differential resistance device using metal nanoparticles, the device includes an organic layer disposed between two metal electrodes, in which the organic layer includes uniformly dispersed metal nanoparticles having a diameter of about 10 nm or less in an organic material. The device of this invention exhibits a volatile negative differential resistance phenomenon at room temperature upon application of a voltage and is thus suitable for use in various switching devices and logic devices, with excellent reproducibility and simple inexpensive processing.

Volatile negative differential resistance device using metal nanoparticles

Provided are a method of manufacturing a lithium ion capacitor and a lithium ion capacitor manufactured using the same. The method of manufacturing a lithium ion capacitor includes forming a lithium thin film on one surface of a separator; making the lithium thin film in contact with an anode, and alternately disposing the anode and a cathode with the separator interposed therebetween to form an electrode cell; and enclosing the electrode cell and an electrolyte into a housing, and pre-doping lithium ions to the anode from the lithium thin film.

Method of manufacturing lithium ion capacitor and lithium ion capacitor manufactured using the same

A network system connected with one or more master devices and a method for operating the same. The system and method enable a new master device to be automatically connected to a network, when the network system is newly constructed or when the new master device is additionally connected to the network with which at least one master device has already been connected. A plurality of slave devices are connected to the network constructed within a building to transmit and receive data through the network. At least one master device controls the slave devices. A network manager automatically assigns a network address to the master device to appropriately connect the master device to the network when the master device is newly connected to the network or additionally connected to the network with which an existing master device is connected. Therefore, a network connection and a setting task associated with the master device are automatically performed, thereby easily and conveniently managing the network and hence reducing costs for managing the network.

Network system connected with multiple master devices and method for operating the same

There is provided an electric double layer capacitor package and a method of manufacturing the same. The electric double layer capacitor package includes an exterior case formed of insulating resin and having therein one or more partitions providing a plurality of housing spaces; a plurality of capacitor cells disposed in the plurality of housing spaces, respectively, each capacitor cell including first and second electrodes and a separator interposed between the first and second electrodes; and an internal series-connection terminal buried in each of the partitions and connecting the plurality of capacitor cells in series.

Electric double layer capacitor package and method of manufacturing the same

An electric double layer capacitor (EDLC) includes an electric double layer cell and first and second external electrodes. The electric double layer cell includes a separator and at least one first polarizable electrode and at least one second polarizable electrode. The first and second external electrodes are formed at first and second side surfaces of the electric double layer cell facing each other, respectively. The first polarizable electrode includes a first current collection layer and a first active material layer formed on either surface of the first current collection layer facing the separator and the second polarizable electrode includes a second current collection layer and a second active material layer formed on either surface of the second current collection layer facing the separator.

Electric double layer capacitor

There are provided an electrolyte for a lithium ion capacitor and a lithium ion capacitor including the same. The electrolyte for a lithium ion capacitor according to the present invention includes: a lithium salt; and a mixing solvent including i) two or more compounds selected from a group consisting of cyclic carbonate compounds, ii) one or more compounds selected from a group consisting of linear carbonate compounds represented by a specified Formula, and iii) one or more compound selected from a group consisting of propionate compound represented by a specified Formula.

Electrolyte for lithium ion capacitor and lithium ion capacitor including the same

There is provided an electric double layer capacitor including: an exterior case having a housing space provided therein and formed of insulating resin; first and second external terminals buried in the exterior case, each having a first surface exposed to the housing space and a second surface exposed to an outside of the exterior case; and a chip-type electric double layer capacitor cell disposed in the housing space and electrically connected to the first surface. The chip-type electric double layer capacitor cell includes first and second electrodes facing each other and having electricity of opposite polarities applied thereto, at least one induction electrode layer disposed between the first and second electrodes and having no electricity applied thereto, and first and second separators disposed between the first electrode and the induction electrode layer and between the second electrode and the induction electrode layer, respectively.

Electric double layer capacitor and method of manufacturing the same

Disclosed are a method for forming an organic layer pattern which is characterized by forming a thin layer by coating a coating solution including a polyimide-based polymer having a heteroaromatic pendant group including a heteroatom in its polyimide major chain, a photoinitiator and a crosslinking agent on a substrate and drying the substrate, and exposing and developing the thin layer, an organic layer pattern prepared by the method, and an organic memory device comprising the pattern. According to example embodiments, a high-resolution micropattern may be formed without undergoing any expensive process, e.g., photoresist, leading to simplification of the preparation process and cost reduction.

Method for forming organic layer pattern, organic layer pattern prepared by the same and organic memory devices comprising the pattern

The present invention provides a chip type electric double layer capacitor including: a lower case having an internal space of which an upper surface is opened and an external terminal of which portions exposed to a bottom of the internal space and the outside are connected to each other; an electric double layer capacitor cell disposed in the internal space of the lower case to be electrically connected to the portion of the external terminal, which is exposed to the bottom of the internal space; and an upper cap mounted on the lower case to cover the internal space, and a method for manufacturing the same.

Chip type electric double layer capacitor and method for manufacturing the same

An organic memory device having a memory active region formed by an embossing structure. This invention provides an organic memory device including a substrate, a first electrode formed on the substrate, an organic memory layer formed on the first electrode, a second electrode formed on the organic memory layer and an embossing structure provided at the organic memory layer to form a memory active region.

Organic memory device having memory active region formed by embossing structure

Disclosed herein are an organic memory device and a method for fabricating the device. The organic memory device may include a first electrode, a second electrode and an organic active layer wherein the organic active layer includes an upper organic material layer formed of an electrically conductive organic material containing heteroatoms and a lower organic material layer formed of an electrically non-conductive organic material containing heteroatoms. Because the organic memory device exhibits improved thermal stability and non-volatility, it may be well suited for use in nonvolatile large-capacity storage units. Flexible electrodes may be used in the organic memory device to fabricate flexible memory devices.

Organic memory device and fabrication method thereof

There are provided methods of manufacturing an electric double layer capacitor cell and an electric double layer capacitor and an apparatus for manufacturing an electric double layer capacitor cell. The method of manufacturing the electric double layer capacitor cell includes preparing first and second electrode sheets by printing electrode material onto conductive sheets, respectively, with the exception of regions to be provided as first and second terminal lead-out portions in the conductive sheets; punching the first and second electrode sheets so as to form a plurality of first and second unit electrodes, respectively, each first unit electrode having the first terminal lead-out portion and each second unit electrode having the second terminal lead-out portion; stacking the first and second electrode sheets with a separator interposed therebetween in order that the plurality of first and second unit electrodes are overlapped; and cutting the first and second electrode sheets being stacked into the first and second unit electrodes.

Methods of manufacturing electric double layer capacitor cell and electric double layer capacitor and apparatus for manufacturing electric double layer capacitor cell

Growing community of inventors

Seongnam-si, South Korea

Sang Kyun Lee