Skhynix Inc.

Hynix Semiconductor Inc.

Sang-Kil Kang

Dae-Sik Park

Se-Han Kwon

Chang-Youn Hwang

Hae-Jung Park

Ill-Hee Joe

A method includes: forming a first contact hole by etching a first inter-layer dielectric layer; forming a preliminary first conductive plug that fills the first contact hole; forming a bit line structure over the preliminary first conductive plug; forming a first conductive plug by etching the preliminary first conductive plug so that a gap is formed between a sidewall of the first contact hole and the first conductive plug; forming an insulating plug in the gap; forming a multi-layer spacer including a sacrificial spacer; forming a second conductive plug neighboring the bit line structures and the first conductive plugs with the multi-layer spacer and the insulating plug therebetween; and forming a line-type air gap within the multi-layer spacer by removing the sacrificial spacer.

Semiconductor memory device with selectively located air gaps

Semiconductor device with line-type air gaps and method for fabricating the same

A method for forming a hole pattern includes forming a hard mask layer for a hole pattern over an etch target layer, forming pillar patterns having a gap therebetween over the hard mask layer for a hole pattern, forming spacer patterns on sidewalls of the pillar patterns, removing the pillar patterns between the spacer patterns, and etching the hard mask layer for a hole pattern by using the spacer patterns as etch barriers.

Method for forming hole pattern

A method for fabricating a semiconductor device includes forming a plurality of pillar structures over a substrate, forming gate electrodes over sidewalls of the pillar structures, forming a sacrificial layer buried between the pillar structures, etching the sacrificial layer and the substrate to form trenches in the substrate, forming first inter-layer insulation patterns buried over the trenches and removing the remaining sacrificial layer at substantially the same time, and forming second inter-layer insulation patterns over the first inter-layer insulation patterns and buried between the pillar structures.

Method for fabricating semiconductor device including vertical channel transistor

Growing community of inventors

Gyeonggi-do, South Korea

Sang-Kil Kang