Samsung Electronics Co., Ltd.

Sang-In Park

Sang-Wan Nam

Il-Han Park

Dong-Ku Kang

Sang-Yong Yoon

Boh-Chang Kim

Ji-Suk Kim

Bu-il Nam

Gyu-Seon Rhim

Sung-Woon Choi

A method for controlling error check and correction (ECC) of a non-volatile memory device includes storing write data in a plurality of storing regions. The write data may be generated by performing ECC encoding. Individual ECC decoding may be performed based on each of a plurality of read data read out from the storing regions. Logic operation data may be provided by performing a logic operation of the read data when the individual ECC decoding fails with respect to all of the read data. Combined ECC decoding may be performed based on the logic operation data.

Method of controlling error check and correction (ECC) of non-volatile memory device and memory system performing the same

A nonvolatile memory device includes a memory cell array, a row decoder circuit, a page buffer circuit, and a control logic circuit. The control logic circuit controls the row decoder circuit and the page buffer circuit to perform: (1) a pre-program of sequentially selecting a plurality of memory blocks and increasing threshold voltages of string selection transistors or ground selection transistors of the selected memory block and (2) after the pre-program is completed, a main program of sequentially selecting the plurality of memory blocks, programming string selection transistors or ground selection transistors of the selected memory block, and performing a verification by using a verification voltage.

Nonvolatile memory device and storage device including nonvolatile memory device

A nonvolatile memory device includes a memory cell array, a page buffer connected to bit lines of the memory cell array, a defect detector, and an input/output circuit. The defect detector receives readout data from the page buffer through the bit lines and performs a logical operation based on the readout data for a plurality of column units. The defect detector outputs defective data based on the logical operation. The input/output circuit outputs the defective data based on a control signal.

Nonvolatile memory device detecting defective bit line at high speed and test system thereof

A method of testing a non-volatile memory device and a method of managing the non-volatile memory device are provided. The method of testing the non-volatile memory device includes calculating first and second values based on program loop frequencies corresponding to word lines of a memory area. A characteristic value of the memory area may be calculated based on the first and second values, and may be compared to a reference value to determine whether the memory area is defective.

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Anyang-si, South Korea

Sang-In Park