Samsung Electronics Co., Ltd.

Sang-il Jung

Young-Hoon Park

Jeong-Ho Lee

Jun-Seok Yang

Min-young Jung

Sun-Hyun Kim

Duk-Min Yi

Jong-wook Hong

An-Chul Shin

Byung-jun Park

Jong-Chae Kim

Jun-Taek Lee

Kyung-ho Lee

Seung-Hoon Kim

Sang-sik Park

Young-hoon Park

Chan Jae Park

Jae-Ho Song

Hisanori Ihara

Yi-Tae Kim

Sae-Young Kim

Dae-cheol Seong

Jun-taek Lee

Ui-Sik Kim

Won-Je Park

Jin-Hyeong Park

Seung-woo Lee

Yun-Ho Jang

Keo-sung Park

Mikio Takagi

Eun-soo Kim

Jae-heon Choi

Won-jeong Lee

Pu-ra Kim

An integrated circuit (IC) device includes a first substrate and a first structure on a front surface of the first substrate. The first structure includes a first interlayer insulating layer structure including a plurality of first conductive pad layers spaced apart from one another at different levels of the first interlayer insulating layer structure. The IC device includes a second substrate on the first substrate and a second structure on a front surface of the second substrate, which faces the front surface of the first substrate. The second structure includes a second interlayer insulating layer structure bonded to the first interlayer insulating layer structure. A through-silicon via (TSV) structure penetrates the second substrate and the second interlayer insulating layer structure. The TSV structure is in contact with at least two first conductive pad layers of the plurality of first conductive pad layers located at different levels.

Integrated circuit devices having through-silicon via structures

A semiconductor device may include a first conductive pattern disposed in a first interlayer insulating film, a second conductive pattern disposed in a second interlayer insulating film positioned on the first interlayer insulating film, a through electrode partially penetrating through the first interlayer insulating film and the second interlayer insulating film. The through electrode electrically connects the first conductive pattern and the second conductive pattern. The device further includes a first pattern completely surrounding side surfaces of the through electrode, and a second pattern between the first pattern and the through electrode. The second pattern is separated from the first pattern and the through electrode. The device includes a third pattern connecting the first pattern and the second pattern.

Semiconductor devices

A device includes a substrate and a plurality of unit pixels disposed in and/or on the substrate, arranged in a honeycomb pattern and separated from one another by a deep trench isolation (DTI) layer. The plurality of unit pixels may include a group of unit pixels radially arranged around and equidistant from a central unit pixel.

Image sensor devices using offset pixel patterns

An anti-reflective image sensor and method of fabrication are provided, the sensor including a substrate; first color sensing pixels disposed in the substrate; second color sensing pixels disposed in the substrate; third color sensing pixels disposed in the substrate; a first layer disposed directly on the first, second and third color sensing pixels; a second layer disposed directly on the first layer overlying the first, second and third color sensing pixels; and a third layer disposed directly on portions of the second layer overlying at least one of the first or second color sensing pixels, wherein the first layer has a first refractive index, the second layer has a second refractive index greater than the first refractive index, and the third layer has a third refractive index greater than the second refractive index.

Anti-reflective image sensor

A method of fabricating a metal interconnection and a method of fabricating image sensor using the same are provided. The method of fabricating a metal interconnection including forming a interlayer dielectric layer on a substrate, forming an interconnection formation region in the interlayer dielectric layer, performing an ultraviolet (UV) treatment on the substrate after the interconnection formation region is formed and forming a metal interconnection in the interconnection formation region.

Method of fabricating metal interconnection and method of fabricating image sensor using the same

An image sensor includes an active pixel and a black pixel. The active pixel has a first signal gain and a first dark signal level, and the black pixel has a second signal gain and a second dark signal level. At least one of the first and second signal gains is adjusted such that the first and second dark signal levels are substantially equal for minimizing image defects in the image sensor.

Image sensor with adjusted gains in active and black pixels

An image sensor includes a photoelectric converter, a source-follower transistor, and a selection transistor. The photoelectric converter generates electric charge in response to received light, and the electric charge varies a voltage of a detection node. The source-follower transistor is coupled between the detection node and an output node and has a first threshold voltage. The selection transistor is coupled between the source-follower transistor and a voltage node with a power supply voltage or a boosted voltage applied thereon, and has a second threshold voltage with a magnitude that is less than a magnitude of the first threshold voltage such that the source-follower transistor operates in saturation.

Image sensor with wide operating range

Methods of forming a dielectric layer of a MIM capacitor can include forming a passivation layer on a dielectric layer of a MIM capacitor to separate the dielectric layer from direct contact with an overlying photo-resist pattern. Related capacitor structures are also disclosed.

Methods of forming metal-insulator-metal (MIM) capacitors with passivation layers on dielectric layers

A method of fabricating an image sensor includes forming a photoelectric transformation device on a substrate and forming a dielectric layer structure on the substrate. The dielectric layer structure includes multi-layer interlayer dielectric layers and multi-layer metal interconnections which are located between the multi-layer interlayer dielectric layers. A cavity which penetrates the multi-layer interlayer dielectric layers on the photoelectric transformation device is formed. A heat treatment is performed on the substrate on which the cavity is formed.

Method of fabricating image sensor

An image sensor includes a substrate, an anti-reflection board and a light shielding film. The substrate includes first pixels to receive a light, and second pixels to provide a black level compensation. The first pixels are formed in an active region and the second pixels are formed in a first region spaced apart from the active region in a row direction. The anti-reflection board is formed in a second region above the substrate, and the second region is between the active region and the first region. The light shielding film is formed above the anti-reflection board, and the light shielding film covers an optical black region including the first and second regions. Therefore, the image sensor may be used in a CCD type image sensor and a CMOS type image sensor to provide a stabilized black level, thereby improving a quality of a displayed image.

Image sensor and method of stabilizing a black level in an image sensor

Example embodiments disclose an image sensor capable of preventing or reducing image lag and a method of manufacturing the same. Example methods may include forming a gate insulating film and a gate conductive film doped with a first-conductive-type dopant on a semiconductor substrate; forming a transfer gate pattern by patterning the gate insulating film and the gate conductive film; and fabricating a transfer gate electrode by forming a first-conductive-type photodiode in the semiconductor substrate adjacent to one region of the transfer gate pattern, by forming a second-conductive-type photodiode on the first-conductive-type photodiode, and by forming a first-conductive-type floating diffusion region in the semiconductor substrate adjacent to the other region of the transfer gate pattern.

Image sensor and method of manufacturing the same

An image sensor for minimizing a dark level defect is disclosed. The image sensor includes an isolation layer formed on a substrate. A field region and an active region are defined on the substrate by the isolation layer. A photodiode is formed in the image sensor in such a structure that a first region is formed below a surface of the substrate in the active region and a second region is formed under the first region. A first conductive type impurity is implanted into the first region and a second conductive type impurity is implanted into the second region. A dark current suppressor is formed on side and bottom surfaces of the isolation layer adjacent to the first region, and the dark current suppressor is doped with the second conductive type impurity. The dark current suppressor suppresses the dark current to minimize the dark level defect caused by the dark current.

Growing community of inventors

Seoul, South Korea

Sang-il Jung