Avago Technologies General IP (singapore) Pte. Ltd.

Avago Technologies Wireless IP (singapore) Pte. Ltd.

Other

Sang Hwa Jung

Jung Hyun Kim

Young Kwon

Moon Suk Jeon

Moon-Suk Jeon

Jung-Rin Woo

Junghyun Kim

Jung-Hyun Kim

Joo Min Jung

Un Ha Kim

Joo Young Jeon

Jung Min Oh

Choong Soo Han

Il Do Jung

Woo Yeon Hong

Woo-Yeon Hong

Jung Rin Woo

In a representative embodiment, a multiple mode power amplifier that is operable in a first power mode and a second power mode. The multiple mode power amplifier comprises a first amplifying unit; a second amplifying unit; a first impedance matching network connected to an output port of the first amplifying unit; a second impedance matching network connected to an output port of the second amplifying unit and to the first impedance matching network; and a third impedance matching network connected to the output ports of the first and the second amplifying units. The third impedance matching network reduces a phase difference between signals amplified by the first and the second amplifying units in the first mode.

High-efficiency power amplifier with multiple power modes

A power amplifier comprises a common source amplification stage and a first common gate amplification stage. The common source amplification stage includes a common source transistor for receiving a radio frequency (RF) input signal via a gate. The first common gate amplification stage is connected in cascode between a variable supply voltage source and the common source amplification stage, and amplifies an output of the common source amplification stage. The first common gate amplification stage includes a first common gate transistor, and a first gate bias controller configured to generate a first divided voltage based on a variable supply voltage of the variable supply voltage source, and to supply a first gate bias voltage generated by buffering the first divided voltage to a gate of the first common gate transistor.

Power amplifier

A power amplifier including a MOSFET including a source supplied with a first DC power, a gate connected to an RF input signal, and a drain connected to a power supply terminal of an RF power amplification unit; a supply voltage modulation control unit that determines a DC gate voltage of the MOSFET based on an envelope of the RF input signal; and a bypass circuit connected between the drain and the power supply terminal. The MOSFET outputs a second DC power via the drain and amplifies the RF input signal based on a third DC power substantially identical to a differential between the first and the second DC power, and also outputs an RF power via the drain. The bypass circuit receives and rectifies the RF power to supply a recycled DC power to the power supply terminal of the RF power amplification unit.

A power amplifier includes first and second amplification stages. The first amplification stage is configured to amplify a radio frequency (RF) input signal. The second amplification stage includes at least one transistor configured to amplify an output of the first amplification stage, the second amplification stage being configured to have a capacitance between a gate of the at least one transistor and a first power supply voltage. The capacitance automatically varies with amplitude of the output of the first amplification stage.

Power amplifier including variable capacitor circuit

In accordance with a representative embodiment, an impedance matching circuit for use at an output stage of a power amplifier is disclosed. The impedance matching circuit comprises: an input port for receiving a frequency band signal; and a plurality of paths, each path being allocated with a principal band signal to be transmitted therethrough and including a path on-off network and a fixed-value impedance matching network. Depending on a type of the received frequency band signal, the path on-off network is configured to activate a selected one of the plurality of paths by rendering an input impedance of the selected path to have a lower absolute magnitude so that the signal is transmitted therethrough, and to deactivate the remaining paths of the plurality of paths by rendering the input impedance thereof to have a higher absolute magnitude so that the signal is not transmitted therethrough. The fixed-value impedance matching network matches a load impedance of the output port of each path to the input impedance thereof, thereby rendering the input impedance thereof to have a prescribed reference value with respect to the principal band signal when said path is activated by the path on-off network.

Impedance matching circuit capable of efficiently isolating paths for multi-band power amplifier

In accordance with another representative embodiment, a high-frequency signal transmitter a power amplifier configured to supply a high-frequency signal; an antenna configured to transmit the high-frequency signal; a transmission line configured to transfer the high-frequency signal from the power amplifier to the antenna; and an impedance matching circuit connected to the transmission line. The high-frequency signal transmitter also comprises a mismatch detector. The mismatch detector is configured to designate a comparatively poor linearity region and a comparatively good linearity region by dividing a Smith chart into the two regions based on Adjacent Channel Power Ratio (ACPR) contours drawn on the Smith chart at a point on the transmission line where the impedance matching circuit is connected, to measure a time-dependent reflection coefficient of the high-frequency signal transmitter in terms of a phase and a magnitude, to determine whether the reflection coefficient is located in the comparatively poor linearity region or the comparatively good linearity region, and based on a result of the determination, to improve the linearity of the high-frequency signal transmitter.

Method and apparatus for providing impedance matching for high-frequency signal transmitter

An amplification device includes a series combination of a driver stage, an output terminal matching network, and a secondary amplification stage. The driver stage includes a driver amplifier and an output matching network. The secondary amplification stage includes a parallel combination of an impedance transformation network and a main amplification stage. The main amplification stage includes a plurality of main amplification branches in parallel with each other, and an input matching network in series with the parallel combination. Each main amplification branch includes a main amplifier, and input and output impedance matching networks. A control circuit supplies activation signals to the main amplification branches to selectively turn them on and off. The device has no switches in the path of the signal that is amplified. In at least one operating mode, the control circuit turns on at least two of the main amplification branches at the same time.

Power amplifier having parallel amplification stages and associated impedance matching networks

A voltage-insensitive circuit includes a second circuit, and a biasing means for providing a constant bias current to the second circuit, the bias current being insensitive to power fluctuations of the voltage-insensitive circuit.

Voltage supply insensitive bias circuits

Provided is a temperature-compensated bias circuit for a power amplifier, in which a first resistor (Rref) connected to a reference voltage is connected to a base terminal of a third transistor (Q) and an emitter terminal of the third transistor is connected to a first diode (D). The temperature-compensated bias circuit includes a second resistor (R) connected to the reference voltage, a third resistor (R) connected to the second resistor in series, a fourth resistor (Rc) having one terminal connected to the reference voltage, a fifth resistor (Re) having one terminal connected to ground, a bias transistor (Q) having a base terminal connected to a contact point (VS) between the second resistor and the third resistor, a collector terminal connected to the other terminal of the fourth resistor, and an emitter terminal connected to the other terminal of the fifth resistor, and a sixth resistor (Rf) connected between a collector terminal of the third transistor and a collector terminal of the bias transistor.

Growing community of inventors

Ansan, South Korea

Sang Hwa Jung