Samsung Electronics Co., Ltd.

Korea Advanced Institute of Science and Technology

Jusung Engineering Co., Ltd.

Sang-Hun Seo

Kyeong-Koo Chi

Chang-woong Chu

Seung-Pil Chung

Ji-soo Kim

Ji-Soo Kim

Tae-hyuk Ahn

Moo-Sung Kim

Chang-Jin Kang

Won-suk Yang

Seung-Hyun Park

Wan-jae Park

Han-Sin Lee

Hong-Young Chang

Heung-Sik Park

Yun-Seong Lee

Provided are a plasma generating apparatus and a substrate treating apparatus. The plasma generating apparatus includes a plurality of ground electrodes arranged inside a vacuum container and extending parallel to each other and power electrodes arranged between the ground electrodes. An area where a distance between the ground electrode and the power electrode is constant exists, and the power electrodes are tapered in a direction facing the substrate. The power electrodes are connected to an RF power source, and height of the power electrode is greater than that of the ground electrode in the direction facing the substrate.

Plasma generating apparatus and substrate processing apparatus

Disclosed herein is a method for etching a face of an object and more particularly a method for etching a rear face of a silicon substrate. The object having a silicon face is positioned so as to be spaced apart from a plasma-generating member by a predetermined interval distance. The plasma-generating member generates arc plasmas to form a plasma region. A reaction gas is allowed to pass through the plasma region to generate radicals having high energies and high densities. The radicals react with the object to etch the face of the object. The face of the object can be rapidly and uniformly etched.

Method for etching an object using a plasma and an object etched by a plasma

A wafer stage including an electrostatic chuck and a method for dechucking a wafer using the wafer stage are provided, wherein, the wafer stage includes an electrostatic chuck support, an electrostatic chuck, a lifting means, and a grounding means including a device for connecting the interconnections for grounding the lifting means. According to the method for dechucking a wafer, when a lifting means is in contact with a rear side of the wafer, the lifting means is grounded. Then, an electrostatic chuck is neutralized by supplying power to electrostatic electrodes, and the wafer is neutralized by supplying plasma to the wafer.

Wafer stage including electrostatic chuck and method for dechucking wafer using the wafer stage

A CMOS semiconductor device and a method of manufacturing the same in which the gate induced drain leakage (GIDL) effect is reduced. In the semiconductor device of this invention, high concentration source/drain regions of a PMOS transistor are formed away from the gate pattern sidewall spacers. This is accomplished by using as an implant mask a dielectric film formed on an entire surface of a semiconductor substrate, where the semiconductor substrate includes a PMOS transistor region in an n-well, a low concentration source/drain regions of a PMOS transistor formed by using a gate pattern as an implant mask, the PMOS transistor gate pattern sidewall spacers, and an NMOS transistor region in a p-well with the NMOS transistor having both a low concentration and a high concentration source/drain regions.

Method of manufacturing the semiconductor device intended to prevent a leakage current from occuring due to a gate induced drain leakage effect

A method of manufacturing a contact of a semiconductor device includes a series of pretreatment processes each performed in a plasma pretreatment module. A semiconductor substrate has an interlayer formed on an underlayer of a material containing silicon. A contact hole is formed in the interlayer to expose a surface of the underlayer. Subsequently, the semiconductor substrate is loaded into a plasma pretreatment module. The photoresist pattern is removed by ashing in the plasma pretreatment module. A damaged layer at the surface exposed by the contact hole is then removed in the plasma pretreatment module. Subsequently, the semiconductor substrate is pre-cleaned in the plasma pretreatment module. The semiconductor substrate is then transferred, while in a vacuum, to a deposition module. There, an upper layer is formed on the substrate to fill the contact hole.

Method of manufacturing a contact of a semiconductor device using cluster apparatus having at least one plasma pretreatment module

A method of removing metal-containing polymeric material and ion implanted or plasma damaged photoresist from a surface using a plasma jet system, by generating radicals having high energy and high density from atmospheric plasma by introducing a reactant gas to the plasma, and placing the surface at a distance from the plasma, whereby ionic reaction on the surface is minimized while the removing action of the radicals on the surface is maintained.

Method for removing residual metal-containing polymer material and ion implanted photoresist in atmospheric downstream plasma jet system

A conducting line of a semiconductor device using an aluminum oxide layer as a hard mask, and a method of forming the conducting line. The conducting line, such as a gate line or a bit line of a semiconductor device, includes a conductive layer formed on a semiconductor substrate, a capping insulation layer formed on the conductive layer, and an aluminum oxide layer formed on the capping insulation layer, with the aluminum oxide layer being used as a hard mask.

Growing community of inventors

Daejeon, South Korea

Sang-Hun Seo