Hyundai Electronics Industries Co. Ltd.

Hynix Semiconductor Inc.

Hyundai Electronics Industries

Sang Hoon Park

Chang S Moon

Dae I Park

Young Chul Lee

Ju Il Lee

Sang I Kim

Hyun Chul Baek

Hyung Sun Yook

Ho Young Choi

Ho Gi Jeong

Hee C Son

Weon G Kim

Dong Sauk Kim

Dong W Baik

The present invention relates to a CMOS (Complementary Metal Oxide Silicon) image sensor; and, more particularly, to an image sensor integrated into one chip, together with a memory. The CMOS image sensor according to the present invention comprises: a pixel array formed on a chip, having a plurality of unit pixels; a logic circuit formed on the chip to process signals form the pixel array; and a memory formed on the chip to store outputs from the logic circuit, wherein the pixel array, the logic circuit and the memory are isolated from each other by insulating layers, whereby the pixel array, the logic circuit and the memory are integrated on the same chip.

CMOS image sensor integrated together with memory device

The present invention relates to a pinned photodiode used in a CMOS image sensor. The pinned photodiode according to the present invention has an uneven surface for increasing an area of a PN junction of the photodiode. So, the increased PN junction area improves a light sensitivity of the photodiode. That is, the epitaxial layer, in which the photodiode is formed, has a trench or a protrusion. Also, in the pinned photodiode, since the P diffusion layer is directly in contact with the P-epi layer, the two P-type layers have the same potential and then it may operate in a low voltage.

Method of forming a photodiode for an image sensor

The present invention relates to a pinned photodiode used in a CMOS image sensor. The pinned photodiode according to the present invention has an uneven surface for increasing an area of a PN junction of the photodiode. So, the increased PN junction area improves a light sensitivity of the photodiode. That is, the epitaxial layer, in which the photodiode is formed, has a trench or a protrusion. Also, in the pinned photodiode, since the P,diffusion layer is directly in contact with the P-epi layer, the two P-type layers have the same potential and then it may operate in a low voltage.

Photodiode with increased photocollection area for image sensor

The present invention is to provide a method for fabricating a CMOS image sensor, including, the steps of providing a semiconductor layer of a first conductive type; exposing a portion of the semiconductor layer, thereby defining a light sensing area in which a photodiode is formed; growing an epitaxial layer on the exposed semiconductor layer; implanting impurities of a second conductive type into the grown epitaxial layer, thereby forming a second type diffusion layer; implanting impurities of the first conductive type into the grown epitaxial layer so that a first type diffusion layer is formed in the second type diffusion layer, wherein a thickness of the first conductive diffusion layer formed is thinner than that of the second type conductive diffusion layer; and patterning the grown epitaxial layer.

Method for fabricating image sensor with extended pinned photodiode

The present invention is to provide a CMOS image sensor, including a photo-sensing region, in which a buried photodiode is formed, for sensing light from an object; a plurality of transistors electrically coupled to the buried photodiode; silicide layers formed on gates and heavily doped regions except the photo-sensing region; and a plurality of insulating layer patterns which are provided by patterning an insulating layer, wherein the insulating layer patterns include: insulating spacers formed on sidewalls of the gates, which are respectively provided for the plurality of transistors; and a passivation layer formed on the photo-sensing region and on a sidewall of neighboring one of the gates.

Image sensor having self-aligned silicide layer

The present invention relates to a method of forming a tungsten plug of a semiconductor device. After forming the tungsten plug in the contact hole, a tungsten residue existed in a portion except a contact hole is oxidized by oxidation and removed. The oxidation process is performed using a chemical mixture of hydrogen peroxide and ultrapure water. A metal wiring pattern including a reflection prevention layer can also be provided on the tungsten plug prior to the residue oxidation and removal.

Method of forming a tungsten plug of a semiconductor device

Disclosed herein is a method for fabricating a metal oxide semiconductor field effect transistor having cobalt silicide. According to the method, there is first provided a semiconductor substrate having exposed silicon portions on the surface thereof. The exposed silicon is either single crystalline silicon or polycrystalline silicon, and may include junction regions in which N typed or P typed impurity such as arsenic, phosphorous, or boron is formed. Niobium and cobalt are sequentially deposited on the exposed silicon portions by electron-beam evaporation method. Afterwards, annealing step is performed to form a cobalt silicide film on the exposed silicon portions.

Method for fabricating MOSFET having cobalt silicide film

A transistor including an insulating file, a gate, and a source/drain all formed on a semiconductor substrate, wherein the gate overlaps at an edge thereof with the source/drain disposed below the gate, whereby the transistor has a structure capable of avoiding a direct contact between the metal wiring and the source/drain. The gate is formed after a formation of the source/drain.

Transistor structure and method for fabricating the same

The present invention provides a method for forming a field oxide layer without the use of the LOCOS process. Accordingly, the present invention provides a superior effect capable of increasing the active region and improving the integration of semiconductor devices, preventing the bird's beak from being generated. Also, in the present invention, since the width of the field oxide layer is the same as that of a spacer on the sidewall of the insulating layer, the area of the field oxide layer is minimized.

Method for forming isolated regions in a semiconductor device

The present invention discloses a method of forming a tungsten plug within a via hole in which it sequentially forms a barrier metal layer and a tungsten layer on a insulating film including the via hole, forms a photoresist pattern of which size is enough to cover the via hole on the tungsten layer in the upper side of the via hole, etching the tungsten layer by sequentially performing an isotropic etching process and an anisotropic etching process using the photoresist pattern as an etching mask and, after the photoresist pattern is removed, etching the projections of the tungsten layer by performing the anisotropic etching process.

Method of forming a tungsten plug in a semiconductor device

A transistor including an insulating film, a gate, and a source/drain all formed on a semiconductor substrate, wherein the gate overlaps at an edge thereof with the source/drain disposed below the gate, whereby the transistor has a structure capable of avoiding a direct contact between the metal wiring and the source/drain. The gate is formed after a formation of the source/drain.

A method for fabricating a metal oxide semiconductor field effect transistor, capable of achieving a reduction in topology by forming a trench on a silicon substrate by use of a temporary field oxide film and forming a gate electrode in the trench and capable of eliminating occurrence of a spiking phenomenon due to a metal wiring being in direct contact with the silicon substrate by forming a silicide film on a source and a drain, and capable of obtaining an increased contact margin of the metal wiring by overlapping the silicide film with a field oxide film formed on the silicon substrate.

Method for fabricating a metal field effect transistor having a recessed

A metal oxide semiconductor field effect transistor having an increased channel length in a limited area of a highly integrated chip where a gate electrode is formed, and a method for fabricating the transistor. The transistor includes a semiconductor substrate having a protruded structure at a predetermined portion thereof, a gate oxide film surrounding the protruded structure of the semiconductor substrate, a polysilicon layer pattern for a gate electrode, the polysilicon layer pattern disposed over the gate oxide film, lightly doped drain regions formed in the semiconductor substrate respectively at opposite edges of the polysilicon layer pattern, and source and drain regions formed outward of the lightly doped drain regions in the semiconductor substrate respectively.

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Kyoungki-do, South Korea

Sang Hoon Park