Samsung Electronics Co., Ltd.

Sang-Hoan Chang

Woo-Yeong Cho

Yeong-taek Lee

Joo-Young Hwang

Chul Ju Lee

Eun-Jin Yun

Sung-Joon Kim

Hyun-Sung Shin

Chan-ik Park

Taek-Soo Kim

Yang-Woo Roh

Jae-Soo Lee

Seong-Moo Heo

Kwang-Suk Yu

An object recognition device including an artificial neural network (NN) engine configured to receive learning data and weights, make an object recognition model (ORM) learn by using the received information, and provide selected weight data including weights from the selected portion of the weights, and further configured to receive a feature vector, and apply the feature vector extracted from an object data that constructs the object and the selected weight data to the learned ORM to provide an object recognition result, a nonvolatile memory (NVM) configured to store the learned ORM, and an error correction code (ECC) engine configured to perform an ECC encoding on the selected weight data to generate parity data, provide the selected weight data and the parity data to the NVM, and provide the selected weight data to the NN engine by performing an ECC decoding on the selected weight data based on the parity data.

Object recognition devices, electronic devices and methods of recognizing objects

A nonvolatile memory device includes a memory cell array including a plurality of nonvolatile memory cells; a page buffer circuit connected to the memory cell array through a plurality of bit lines; a calculation circuit configured to perform a calculation on information bits and weight bits based on a calculation window having a first size, the information bits and weight bits being included in a user data set, the memory cell array being configured to store the user data set, the calculation circuit being further configured to receive the user data set through the page buffer circuit; and a data input/output (I/O) circuit connected to the calculation circuit, wherein the calculation circuit is further configured to provide an output data set to the data I/O circuit in response to the calculation circuit completing the calculation with respect to all of the information bits and the weight bits, and wherein the output data set corresponds to a result of the completed calculation.

Nonvolatile memory devices, memory systems and methods of operating nonvolatile memory devices for processing user data

A memory device may include a normal cell which is configured to be programmed to a first resistance and stabilized as a resistance of the normal cell drifts from the first resistance to a second resistance; a flag cell which is configured to be programmed to a third resistance smaller than the first resistance and stabilized as a resistance of the flag cell drifts from the third resistance to a fourth resistance smaller than the second resistance; and a decision circuit which is configured to decide whether the flag cell has been stabilized in order to determine whether the normal cell has been stabilized.

Memory device using flag cells and system using the memory device

In a method of programming a phase change memory device, write data is programmed in a plurality of phase change memory cells by applying write pulses to each of the plurality of phase change memory cells. Whether each of the phase change memory cells is programmed is verified by applying verification pulses to each of the phase-change memory cells. A number of applications for the verification pulses and the intervals between respective applications of the verification pulses are varied in accordance with a verification result for each of the phase-change memory cells.

Phase change memory device, memory system, and programming method using variable verification pulses

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Suwon-si, South Korea

Sang-Hoan Chang