Hynix Semiconductor Inc.

Eugene Technology Co., Ltd.

Sang Ho Woo

Cheol Hwan Park

Dong Su Park

Tae Hyeok Lee

Hai Won Kim

Gil Sun Jang

Sung Kil Cho

Seung Woo Shin

Wan Suk Oh

Chang Rock Song

Young Gi Kim

Byung Gyu Song

Il Kwang Yang

Seung Won Choi

Provided is a method of manufacturing a memory device having a 3-dimensional structure, which includes alternately stacking one or more dielectric layers and one or more sacrificial layers on a substrate, forming a through hole passing through the dielectric layers and the sacrificial layers, forming a pattern filling the through hole, forming an opening passing through the dielectric layers and the sacrificial layers, and supplying an etchant through the opening to remove the sacrificial layers. The stacking of the dielectric layers includes supplying the substrate with one or more gases selected from the group consisting of SiH, SiH, SiH, and SiH, to deposit a silicon oxide layer. The stacking of the sacrificial layers includes supplying the substrate with one or more gases selected from the group consisting of SiH, SiH, SiH, SiH, and dichloro silane (SiClH), and ammonia-based gas, to deposit a silicon nitride layer.

Method and apparatus for manufacturing three-dimensional-structure memory device

According to one embodiment of the present invention, a plasma treatment apparatus comprises: a chamber having an inner space in which processes for an object to be treated are performed; and an antenna which is arranged to cover the side part of the chamber, and which forms electric fields in said inner space to generate plasma from the source gas supplied in the inner space. The antenna includes a helical antenna which is formed into a helical shape from one side of the chamber toward the other side of the chamber along a first rotation direction, and which has a current flowing in the first rotation direction; an extension antenna which is connected to one end of the helical antenna positioned at said one side of the chamber, and which has a current flowing in the direction opposite to the first rotation direction; and a connection antenna for interconnecting the extension antenna and the helical antenna.

Plasma treatment apparatus and plasma antenna

A method for manufacturing a memory device having a vertical structure according to one embodiment of the present invention comprises: a step for alternatingly laminating one or more insulation layers and one or more sacrificial layers on a substrate; a step for forming a penetration hole for penetrating the insulation layer and the sacrificial layer; a step for forming a pattern for filling up the penetration hole; a step for forming an opening for penetrating the insulation layer and the sacrificial layer; and a step for removing the sacrificial layer by supplying an etchant through the opening, wherein the step for laminating the insulation layer includes a step for depositing a first silicon oxide film by supplying to the substrate at least one gas selected from the group consisting of SiH, SiH, SiH, SiH, and the step for laminating the sacrificial layer includes a step for depositing a second silicon oxide film by supplying dichlorosilane (SiClH) to the substrate.

Provided is a production method for a semiconductor device comprising a metal silicide layer. According to one embodiment of the present invention, the production method for a semiconductor device comprises the steps of: forming an insulating layer on a substrate, on which a polysilicon pattern has been formed, in such a way that the polysilicon pattern is exposed; forming a silicon seed layer on the exposed polysilicon pattern that has been selectively exposed with respect to the insulating layer; forming a metal layer on the substrate on which the silicon seed layer has been formed; and forming a metal silicide layer by carrying out a heat treatment on the substrate on which the metal layer has been formed.

Production method for semiconductor device

Provided is a method of depositing a cyclic thin film that can provide excellent film properties and step coverage. The method comprises the steps of forming a silicon thin film by repeating a silicon deposition step for depositing silicon on a substrate by injecting a silicon precursor into a chamber into which the substrate is loaded and a first purge step for removing a non-reacted silicon precursor and a reacted byproduct from the chamber; and forming the insulating film including silicon from the silicon thin film by forming a plasma atmosphere into the chamber.

Method for depositing cyclic thin film

The present invention discloses methods for manufacturing a capacitor of a semiconductor device employing doped silicon film as an electrode and an oxide film-nitride film-oxide film as a dielectric film. An interlayer insulating film is formed on a semiconductor substrate. A storage electrode is formed consisting of a doped polysilicon on the interlayer insulating film. A first oxide film is formed on the storage electrode that is subjected to a thermal treatment in an atmosphere containing an n-type impurity to implant the impurity into the first oxide film. A nitride film is formed on the first oxide film, whereby the impurity in the first oxide film is diffused into the nitride film. A second oxide film is formed on the nitride film. A plate electrode is then formed on the second oxide film.

Method for manufacturing a capacitor of a semiconductor device

Disclosed is a method of manufacturing a semiconductor device. The method includes the steps of forming a gate in a cell region and a peripheral region of a substrate, depositing a buffer oxide layer on the gate and the substrate, annealing a resultant structure of the substrate, depositing a nitride spacer layer on the buffer oxide layer, depositing an oxide spacer layer on the nitride spacer layer, forming an oxide spacer at the peripheral region of the substrate, and removing the oxide spacer layer remaining in the cell region. The annealing step is additionally carried out after depositing the buffer oxide layer so as to improve the interfacial surface characteristic and film quality, so that oxide etchant is prevented from penetrating into the silicon substrate during the wet dip process. Unnecessary voids are prevented from being created in the silicon substrate.

Method of manufacturing semiconductor device

Disclosed is a method for fabricating a semiconductor device by using a PECYCLE-CVD process. The method includes the steps of feeding source gas into a process chamber for predetermined time within one cycle, allowing reaction gas to flow in the process chamber at least until a plasma reaction is finished in the process chamber and feeding purge gas into the process chamber for a predetermined time within one cycle, thereby purging residual products remaining in the process chamber after source gas is reacted, forming plasma in the process chamber for a predetermined time within one cycle so as to allow reaction gas to react with plasma, thereby depositing a thin film on a wafer, and feeding purge gas into the process chamber for a predetermined time within one cycle, thereby purging residual products remaining in the process chamber after reaction gas is reacted. Superior step-coverage and uniformity of the thin film are achieved while depositing the thin film at a higher speed.

Method for fabricating semiconductor device by using PECYCLE-CVD process

A method for forming a device isolation film of a semiconductor device, wherein an annealing process is performed on the oxide film using NH3 prior to the deposition of a liner nitride film and after the deposition of a thermal oxide film on a sidewall of a trench to nitridate the oxide film is disclosed. The method comprises the steps of: (a) sequentially forming a pad oxide film and a pad nitride film on a semiconductor substrate; (b) selectively etching the pad nitride film to form a nitride film pattern; (c) etching the pad oxide film and a predetermined thickness of the semiconductor substrate using the nitride film pattern as a hard mask to form a trench; (d) forming a thermal oxide film on the surface of the trench; (e) performing an annealing process under NH3 atmosphere to form an oxide nitride film on the surface of the thermal oxide film; (f) forming a liner nitride film on the entire surface; (g) forming an oxide film filling the trench on the entire surface; and (h) performing a planarization process.

Method for forming device isolation film of semiconductor device

A method for fabricating a capacitor for a semiconductor device is disclosed, which comprises the steps of: forming a storage node electrode on a semiconductor wafer, forming a dielectric layer made of a cyclic silicon nitride layer on the surface of the storage node electrode, and forming an upper electrode on the dielectric layer; lowering the thickness Tof the dielectric layer and improving leakage current characteristics through use of a cyclic SiNor a cyclic SiON(wherein x falls between 0.1 and 0.9 and y falls between 0.1 and 2), having a large oxidation resistance and high dielectric ratio, as a dielectric.

Method for fabricating capacitor in semiconductor device

A capacitor in a semiconductor device and a method for fabricating the same is disclosed. Disclosed the method for fabricating the capacitor in a semiconductor device comprises the steps of: forming a lower electrode made of doped silicon materials on a semiconductor substrate; depositing a thin silicon nitride layer on the lower electrode; forming a silicon oxynitride layer on the surface of the silicon nitride layer through oxidation of the silicon nitride layer; depositing a dielectric layer on the silicon oxynitride layer; and forming an upper electrode on the dielectric layer. According to the method, after the deposition of the silicon nitride layer on the dielectric layer, oxidation treatment of the resultant structure is performed and the dielectric layer is formed on the oxidized silicon nitride layer, thereby improving the interface characteristics between the lower electrode and the dielectric layer and resulting in a decrease of the leakage current and an increase of the breakdown voltage of the capacitor in the semiconductor device.

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Gyeonggi-do, South Korea

Sang Ho Woo