Samsung Electronics Co., Ltd.

Sang-Gyun Woo

Gi-Sung Yeo

Han-Ku Cho

Hyun-Woo Kim

Cha-Won Koh

Mitsuhiro Hata

Ji-young Lee

Jung-hwan Hah

Jin Kuk Hong

Joon-Soo Park

Doo-Hoon Goo

Seok-hwan Oh

Sang-jun Choi

Yool Kang

Dong-Seok Nam

Jeong-lim Nam

Hyun-Jae Kang

Kyoung-Yun Baek

Suk-joo Lee

Joo-Tae Moon

Myoung-Ho Jung

Hoon Tae Kim

Chan Soo Hwang

Kwang-sub Yoon

Jai-Hyuk Song

Byung-Hong Chung

Hyun Kyu Park

Il-Yong Jang

Seok-Hwan Oh

Ki-Yong Song

Kolake Mayya Subramanya

Hata Mitsuhiro

Jang-Ho Shin

Tae-young Kim

Hyun-woo Kim

Sung-Ho Lee

Seong-sue Kim

Kyeong-Koo Chi

Sung-ho Lee

Sook Jin Lee

Seung-Pil Chung

Ji-Soo Kim

Byeong-Soo Kim

Jung-hyeon Lee

Sung-Gon Jung

Doo-youl Lee

Suk-Joo Lee

Si-hyeung Lee

Byeong-soo Kim

Jin-hong Park

Man-hyoung Ryoo

Man-Hyoung Ryoo

Joo-On Park

Young-Seog Kang

Dong-Won Jung

Myoung-soo Lee

Si-Hyeung Lee

Hye-Kyoung Lee

Jung-Hwan Hah

Yun-sook Chae

Jin-young Yoon

Sung-Soo Suh

Heung-Sik Park

Ki-young Kwon

Young-Su Sung

Haek-seung Han

Duo-Hoon Goo

Joo-Tac Moon

Halftone phase shift photomasks are provided including a substrate configured to transmit light; a shift pattern on the substrate, the shift pattern including a pattern area on a center portion of the substrate and a blind area disposed on a periphery of the substrate, the shift pattern of the blind area having a greater thickness than a thickness that of the pattern area, and being configured to partially transmit the light; and a light shielding pattern formed on the shift pattern in the blind area and being configured to shield the light. Related methods are also provided herein.

Halftone phase shift blank photomasks and halftone phase shift photomasks

A method of correcting an optical parameter in a photomask is provided. The method includes providing a photomask, exposing the photomask, detecting an aerial image to estimate the photomask, and irradiating gas cluster ion beams to the photomask based on an estimation result to correct the optical parameter in the photomask in relation to the aerial image. The gas cluster ion beams may be irradiated to a front surface of the photomask on which a mask pattern is formed or a rear surface of the photomask on which the mask pattern is not formed.

Methods of correcting optical parameters in photomasks

Methods of fabricating halftone phase shift blank photomasks and halftone phase shift photomasks

Provided are a mask pattern including a silicon-containing self-assembled molecular layer, a method of forming the same, and a method of fabricating a semiconductor device. The mask pattern includes a resist pattern formed on a semiconductor substrate and the self-assembled molecular layer formed on the resist pattern. The self-assembled molecular layer has a silica network formed by a sol-gel reaction. To form the mask pattern, first, the resist pattern is formed with openings on an underlayer covering the substrate to expose the underlayer to a first width. Then, the self-assembled molecular layer is selectively formed only on a surface of the resist pattern to expose the underlayer to a second width smaller than the first width. The underlayer is etched by using the resist pattern and the self-assembled molecular layer as an etching mask to obtain a fine pattern.

Mask pattern for semiconductor device fabrication, method of forming the same, and method of fabricating finely patterned semiconductor device

A semiconductor device has a structure of contacts whose size and pitch are finer that those that can be produced under the resolution provided by conventional photolithography. The contact structure includes a semiconductor substrate, an interlayer insulating layer disposed on the substrate, annular spacers situated in the interlayer insulating layer, first contacts surrounded by the spacers, and a second contact buried in the interlayer insulating layer between each adjacent pair of the first spacers. The contact structure is formed by forming first contact holes in the interlayer insulating layer, forming the spacers over the sides of the first contact holes to leave second contact holes within the first contact holes, etching the interlayer insulating layer from between the spacers using the first spacers as an etch mask to form third contact holes, and filling the first and second contact holes with conductive material. In this way, the pitch of the contacts can be half that of the first contact holes.

Semiconductor device having fine contacts and method of fabricating the same

A method of forming a fine pattern of a semiconductor device using a fine pitch hard mask is provided. A first hard mask pattern including first line patterns formed on an etch target layer of a substrate with a first pitch is formed. A first layer including a top surface where a recess is formed between adjacent first line patterns is formed. A second hard mask pattern including second line patterns within the recess is formed. An anisotropic etching process is performed on the first layer using the first and the second line patterns as an etch mask. Another anisotropic etching process is performed on the etch target layer using the first and the second hard mask patterns as an etch mask.

Method of forming pattern using fine pitch hard mask

A semiconductor memory device may include a semiconductor substrate having a plurality of active regions wherein each active region has a length in a direction of a first axis and a width in a direction of a second axis. The length may be greater than the width, and the plurality of active regions may be provided in a plurality of columns in the direction of the second axis. A plurality of wordline pairs may be provided on the substrate, with each wordline pair crossing active regions of a respective column of active regions defining a drain portion of each active region between wordlines of the respective wordline pair. A plurality of bitlines on the substrate may cross the plurality of wordline pairs, with each bitline being electrically coupled to a drain portion of a respective active region of each column, and with each bitline crossing drain portions of active regions of adjacent columns in different directions so that different portions of a same bitline are aligned in different directions on different active regions of adjacent columns.

Semiconductor memory devices including diagonal bit lines

A semiconductor memory device may include a substrate having a plurality of active regions wherein each active region has a length in a direction of a first axis and a width in a direction of a second axis. The length may be greater than the width, and the plurality of active regions may be provided in a plurality of columns of active regions in the direction of the second axis. A plurality of wordline pairs may be provided on the substrate, with each wordline pair crossing active regions of a respective column of active regions defining a drain portion of each active region between wordlines of the respective wordline pair. A plurality of bitlines on the substrate may cross the plurality of wordline pairs, with each bitline being electrically coupled to a respective drain portion of an active region of each column, and with each bitline being arranged between the respective drain portion and another drain portion of an adjacent active region of the same column.

Semiconductor memory devices including offset bit lines

A photomask or equivalent optical component includes a scattering element in the medium of a substrate, which actively modifies (adjusts/filters the intensity, shape, and/or components of) light that propagates through the substrate. The substrate has a front surface and a back surface and is transparent to exposure light of a photolithography process, i.e., light of given wavelength, at least one mask pattern at the front surface of the substrate and the image of which is to be transferred to an electronic device substrate in a photolithographic process using the photomask, a blind pattern at the front surface of the substrate and opaque to the exposure light, and the scattering element. The scattering element, in addition to being formed in the medium of the substrate, is situated below the blind pattern as juxtaposed with the blind pattern in the direction of the thickness of the substrate. Also, a section of the photomask substrate is irradiated with energy which does not melt and/or vaporize the medium of the photomask substrate to form the scattering element. To this end, a femtosecond laser may be used.

Photomask

Mask patterns include a resist pattern and a gel layer on a surface of the resist pattern having a junction including hydrogen bonds between a proton donor polymer and a proton acceptor polymer. Methods of forming the mask patterns and methods of fabricating a semiconductor device using the mask patterns as etching masks are also provided.

Mask patterns including gel layers for semiconductor device fabrication

An optical proximity correction (OPC) system and methods thereof are provided. The example OPC system may include an integrated circuit (IC) layout generation unit generating an IC layout, a database unit storing a first plurality of OPC models, each of the first plurality of OPC models associated with one of a plurality of target specific characteristics and a mask layout generation unit including a model selector selecting a second plurality of OPC models based on a comparison between the target specific characteristics associated with the plurality of OPC models and the generated IC layout, the mask layout generation unit generating a mask layout based on the IC layout and the selected second plurality of OPC models. A first example method may include storing a first plurality OPC models, each of the first plurality of OPC models associated with one of a plurality of target specific characteristics, generating an IC layout, selecting a second plurality of OPC models based on a comparison between the target specific characteristics associated with the first plurality of OPC models and the generated IC layout and generating a mask layout based on the generated IC layout and the selected second plurality of OPC models. A second example method may include applying a first OPC model to a first portion of a generated integrated circuit (IC) layout, applying a second OPC model to a second portion of the generated IC layout and generating a mask layout based on the generated IC layout after the application of the first and second OPC models.

System and method correcting optical proximity effect using pattern configuration dependent OPC models

Provided is a method for forming patterns of a semiconductor device. According to the method, first mask patterns may be formed on a substrate, and second mask patterns may be formed on sidewalls of each first mask pattern. Third mask patterns may fill spaces formed between adjacent second mask patterns, and the second mask patterns may be removed. A portion of the substrate may then be removed using the first and third mask patterns as etch masks.

Method for forming patterns of semiconductor device

Methods of forming an integrated circuit device may include forming a resist pattern on a layer of an integrated circuit device with portions of the layer being exposed through openings of the resist pattern. An organic-inorganic hybrid siloxane network film may be formed on the resist pattern. Portions of the layer exposed through the resist pattern and the organic-inorganic hybrid siloxane network film may then be removed. Related structures are also discussed.

Mask patterns for semiconductor device fabrication and related methods and structures

Semiconductor device having fine contacts

Growing community of inventors

Yongin-si, South Korea

Sang-Gyun Woo