Samsung Electronics Co., Ltd.

Sang-Gui Jo

Ji-Yong Park

Sa-Yoon Kang

Byung-seo Kim

Kyoung-sei Choi

Seung-Kon Mok

Ye-chung Chung

Si-hoon Lee

Kyong-Soon Cho

Soyoung Lim

Young-sang Cho

Kwangjin Bae

Dae-woo Son

Han-Shin Youn

Sang-Heui Lee

Young-jae Joo

Jeong-kyu Ha

Hee-Seok Lee

Seung-Hwan Kim

Chul-Woo Kim

Kwang-Jin Bae

A semiconductor package includes a base substrate, a semiconductor chip mounted on the base substrate and including bonding pads, first and second connection terminals disposed adjacent to the semiconductor chip on the base substrate and electrically connected to the bonding pads, a first ball land disposed on the base substrate and electrically connected to the first connection terminal, a second ball land spaced apart from the connection terminals, the first ball land disposed between the second ball land and at least one of the first and second connection terminals, a first insulating layer covering the first ball land but exposing at least a part of the second ball land, and a first conductive wire extending onto the first insulating layer and connecting the second connection terminal to the second ball land.

Method of fabricating semiconductor package having substrate with solder ball connections

An electronic device includes first and second interconnections formed on a first surface of a substrate and spaced apart from each other. The electronic device includes a first insulating material layer disposed on the substrate including the first and second interconnections and including a first opening exposing a predetermined region of the first interconnection. The electronic device further includes a first pad filling the first opening and having a greater width than the first opening. The first pad covers at least a part of the second interconnection adjacent to one end of the first interconnection, and the first pad is electrically insulated from the second interconnection by the first insulating material layer.

Electronic device having interconnections, openings, and pads having greater width than the openings

Semiconductor package having substrate with solder ball connections and method of fabricating the same

Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.

Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and electronic apparatus including the same

A circuit board and a semiconductor package having the same are provided. The circuit board comprises a base substrate having interconnections, and solder ball lands disposed on one surface of the base substrate. The solder ball lands respectively have land holes having different sizes. The land hole disposed at the center portion of the base substrate and the land hole disposed at the edge portion of the base substrate may have different sizes. For example, the sizes of the land holes may increase from the center portion of the base substrate to the edge portion thereof, and alternatively, the sizes of the land holes may decrease from the center portion of the base substrate to the edge portion thereof.

Circuit board including solder ball land having hole and semiconductor package having the circuit board

Growing community of inventors

Seoul, South Korea

Sang-Gui Jo