Korea Advanced Institute of Science and Technology

Samsung Electronics Co., Ltd.

Electronics and Telecommunications Research Institute

Research & Industrial Cooperation Group

Sang-Gug Lee

Seok-Kyun Han

Jeong-Il Seo

Hoon-Tae Kim

Choong-yul Cha

Ho-Yong Kang

Sun-A Kim

Kyoung-Young Choi

Dae-Woong Park

Baek-Min Lim

Dae-Young Yoon

Ji-Eun Kim

Hyun Kyu Yu

Cheol-Sig Pyo

Jae-Seung Lee

Yool Kwon

Nae-Soo Kim

Mun Yang Park

Seon-Ho Han

Young Jae Lee

Bong-Tae Kim

Chang Sun Kim

Seung-Tak Ryu

Jaesup Lee

Seong-Do Kim

Chun-deok Suh

Eun-chul Park

Nam-soo Kim

Hyun-Kyun Choi

Seong Hoon Choi

Yong-Sik Youn

Eui-Rim Jeong

Hyung-Chul Park

Xiaohua Yu

Quan Le

Jeong-seon Lee

Trung-Kien Nguyen

Yeong-Shin Jang

Jong-Phil Hong

Bao Lam Huu

Sang-sung Lee

Suna Kim

Seok-Ju Yun

Min-suk Kang

Tuan-anh Phan

Chang-wam Kim

Guillaume Thenaisie

Nam-Jin Oh

Sang Sung Lee

Jeong Seon Lee

Young-Seok Noh

Yuna Shim

Sun A Kim

Seungjin Kim

In Young Lee

Hyun-Mo Gu

Keun-Mok Kim

Jinho Ko

A method and apparatus for modulating/demodulating an FSK signal capable of overcoming a trade-off relationship between a modulation index and a spectral efficiency are disclosed. An apparatus for modulating/demodulating a frequency deviation keying (FSK) signal includes a channel selection-modulator, a phase locked loop, and an output unit. The channel selection-modulator modulates an FSK signal by setting a frequency channel to be used. The phase locked loop generates a desired output frequency 'fout' compared to a reference frequency 'f' by adjusting a frequency division ratio (N+n) with respect to a frequency of the modulated FSK signal. The output unit amplifies the FSK signal having the generated output frequency &#x2018;fout&#x2019; and radiating the amplified FSK signal through an antenna. Here, each of the frequency channels is divided into two or more tones, and different frequency channels are allocated between the tones divided into two or more tones.

Method and apparatus for modulating/demodulating an FSK signal

A current mode hysteretic buck converter employing an auto-selectable frequency locking circuit is disclosed. The auto-selectable frequency locking type buck converter include a current mode hysteretic buck converter for converting an input DC voltage into a lower DC voltage, and a frequency locking unit for locking a switching frequency of the current mode hysteretic buck converter wherein the switching frequency is locked through adjusting a locking value of the switching frequency to be a predetermined value according to a size of a load. The buck converter is, based on the current mode hysteretic control, related to a circuit that locks the switching frequency of the converter to reduce the difficulty of designing electromagnetic interference (EMI) filters in the converter. In addition, the buck converter can improve the efficiency at light load by adjusting the switching frequency which is locked according to the load current.

Current mode hysteretic buck converter with auto-selectable frequency locking circuit

Disclosed is an optimized battery charging method based on thermodynamic information of a battery. Thermodynamic information on a material structure of a battery, for instance, entropy of the battery is extracted. Boundary points at which state transitions of the battery material are determined using the thermodynamic information extracted. Phases of the battery are identified based on the boundary points determined. The most appropriate charging patterns adapted to each of the phases identified are determined. A charging algorithm for charging the battery can be constructed by combining the most appropriate charging patterns determined. This charging algorithm is applied to the charging of the battery.

Optimized battery charging method based on thermodynamic information of battery

A power management device according to example embodiments includes a self-startup circuit including an oscillator and a voltage multiplier to generate a start-up voltage in a first start-up period based on an input voltage, a boost converter to alternately charge the start-up voltage and an output voltage within a start-up voltage range during a second start-up period and to charge only the output voltage during an operation period, a controller to control the self-startup circuit and the boost converter based on a magnitude of the start-up voltage, a voltage charger including a start-up voltage capacitor and an output voltage capacitor, and a shared inductor connected between the input node and a common input node. The shared inductor operates as a part of the oscillator during the first start-up period and a part of the boost converter during the second start-up and operation periods.

Power management device for energy harvesting

A phase locked loop includes a signal receiver configured to generate a mixed signal based on the received signal and an oscillator signal, and a frequency control circuit configured to compare the mixed signal to a reference signal, and adjust the oscillator signal based on a result of the comparing.

Phase locked loop using received signal

Provided is an antenna module that comprises an antenna comprising a radiation patch for transmitting or receiving the terahertz wave, and a first ground disposed away from the radiation patch, the first ground having a hole, an integrated circuit board having a signal processing unit configured to generate the terahertz wave or to process the terahertz wave received through the antenna, the integrated circuit board being disposed under the antenna and a via configured to connect the radiation patch with the signal processing unit, the via passing through the hole.

Antenna module for transmitting or receiving terahertz waves and focal plane array structure for real-time terahertz imaging

The present invention provides a power gain-boosting technique for an amplifier in order to compensate for the decrease of Gin a transistor at high frequencies. A power gain-boosting technique of the present invention comprises the steps of: finding the Maximum Unilateral Gain or Mason's Invariant U of a transistor; designing a linear, lossless, reciprocal network embedding the transistor so that the final equivalent S-, Y-, or Z-parameters satisfy the condition: embedding the transistor into the linear, lossless, reciprocal network; and constructing simultaneous conjugate matching.

Method for high-frequency amplifier using power gain-boosting technique

Provided is an image sensing device that includes a detector configured to detect a terahertz wave signal received by a receiving antenna, a voltage-controlled oscillator configured to output an oscillation frequency according to an output voltage of the detector, and a frequency digital converter configured to convert the oscillation frequency output from the voltage-controlled oscillator to a digital signal.

Image sensing device and focal plane array device using frequency conversion for real-time terahertz imaging

A receiving apparatus in a wireless communication system includes: an antenna configured to receive a wireless frequency signal including a first frequency band signal and a second frequency band signal; a low noise amplifier (LNA) configured to amplify the wireless frequency signal, output the first frequency band signal as a differential phase signal, and output the second frequency band signal as a common phase signal; a differentiator configured to pass only the differential phase signal between the signals outputted from the LNA; and a combiner configured to pass only the common phase signal between the signals outputted from the LNA.

Signal converting apparatus and receiving apparatus for supporting concurrent dual bands in wireless communication system

A transimpedance amplifier for a burst mode optical communication converts a burst current signal into differential output voltage signals. Using a multi-level digital AGC mechanism, the transimpedance amplifier is rapidly adapted to a burst signal whose amplitude varies in a wide range. By using an adaptive level detection method, a multi-level digital AGC can be implemented without using ADC. In addition, because the transimpedance amplifier uses a selective reset generation scheme that performs a reset operation for itself after a high power burst, a burst mode operation can be performed without external reset signals. Accordingly, the transimpedance amplifier can be integrated with an optical detector within a TO-can. Furthermore, the transimpedance amplifier can have the burst mode capability and the best sensitivity.

Digital automatic gain control apparatus and method in burst mode optical receiver

A frequency synthesizer includes: a delta sigma modulator that outputs an input value to a sequentially changing digital value; an analog path unit that converts the digital value to an analog value according to a first conversion gain; an accumulator that accumulates a difference between the input and digital values; a digital to analog converter (DAC) that compensates an output value of the accumulator according to a second conversion gain; a correction loop that extracts analog tendency by adding an output of the analog path unit and an output of the DAC and that extracts digital tendency from an output of the accumulator and adjusts the second conversion gain by comparing the analog and digital tendency; and a voltage control oscillator that generates an output frequency by adding an output of the analog path unit and an output according to an adjusted second conversion gain of the DAC.

Frequency synthesizer, method of generating output frequency thereof and method of correcting conversion gain thereof

The present invention relates to an apparatus for rejecting images in a receiver. The apparatus of the present invention relates to an apparatus for rejecting image signals in a receiver of a direct conversion structure and comprises a signal mismatch compensation unit configured to detect gain error and phase error between an In-phase (I) signal and a Quadrature (Q) signal received through the receiver, to reject image signals existing in the I and Q signals, and to output a result. The signal mismatch compensation unit detects the gain error and the phase error using an adaptive step method of reducing the step size of the gain error and the phase error step by step whenever the gain error and the phase error are converged. According to the present invention, high image rejection ratio is achieved and the adaptation time taken to obtain a high image rejection ratio is reduced simultaneously. Further, a bad influence of the DC offset on the image rejection ratio can be prevented by removing DC offset signals in a digital structure, accordingly, error can be accurately estimated.

Apparatus for rejecting image in receiver

Provided is a low-power wake-up receiver that is sensitive to electric waves, by which power consumed by a radio frequency (RF) transceiver of a sensor node in a ubiquitous sensor network (USN) is minimized. A wake-up receiver waking up a main transceiver includes a duty cycle signal generation unit controlling a duty cycle of a duty cycle signal; a burst signal detection unit receiving an input signal including a burst signal and a data signal based on the duty cycle signal, amplifying the input signal, and, if the amplified input signal is the burst signal, outputting a control signal; and a data signal detection unit re-amplifying the amplified input signal based on the control signal, and, if the re-amplified input signal is the data signal, outputting a wake-up signal. Power supplied to the duty cycle signal generation unit is interrupted based on the control signal and power is re-supplied to the duty cycle signal generation unit based on the wake-up signal.

Wake-up receiver and wake-up method using duty cycling and power off technique

A DC offset cancellation circuit includes: a control signal generation unit generating i (i is a natural number) number of pulse signals having a pulse width corresponding to a DC offset amount; a current source supplying i number of currents each having a different current ratio; a switching unit determining a current quantity to be supplied to a feedback capacitor by adjusting a turn-on quantity of each of the i number of currents according to the pulse width of each of the i number of pulse signals; and an electric charge quantity regulation unit charging DC offset electric charges corresponding to current supplied from the switching unit through the feedback capacitor and transferring the DC offset electric charges charged in the feedback capacitor to a sampling capacitor through a rotary capacitor, to allow the sampling capacitor to primarily store the DC offset electric charges and then secondarily store electric charges corresponding to an input signal.

DC offset cancellation circuit

A digital feedforward sigma-delta modulator in an analog-to-digital converter and its modulation method are disclosed. The modulator changes a feedforward path from an analog domain to a digital domain and processes it. The modulator integrates an analog input by using a plurality of integrators, weights them, quantizes them by using a plurality of quantizers in a digital domain to output digital signals, and then adds up the thusly outputted digital signals by using a digital adder. In case of a continuous time digital feedforward sigma-delta modulator (SDM), a digital signal outputted from the digital adder is weighted and then immediately inputted to the digital adder in the digital domain so as to be subtracted, allowing for digital feedforwarding. Because the feedforward signal is processed in the digital domain, the area occupied by an analog circuit and power consumption can be reduced. Also, because signals are added up in the digital domain, a digital output signal can be immediately used when an excess loop delay needs to be corrected. Thus, because there is no need to convert the digital output signal into an analog signal by using a DAC, the DAC can be omitted.

Digital feedforward sigma-delta modulator in analog-to-digital converter and modulation method thereof

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Daejeon, South Korea

Sang-Gug Lee