Samsung Electronics Co., Ltd.

Sang-bum Kang

Gil-heyun Choi

Hee-Sook Park

Seung-man Choi

Hyo-Jong Lee

Seong-geon Park

Byung-Hee Kim

Sang-in Lee

Kwang-Jin Moon

In-Sun Park

Kyung-In Choi

Kwang-jin Moon

Hyun-seok Lim

Gil-Heyun Choi

Hyun-Seok Lim

Yun-sook Chae

Mee-young Yoon

In-Su Ha

Jong-sik Chun

A metal contact in a semiconductor device is formed by forming an insulating layer having a contact hole therein on a silicon substrate. A cobalt layer is formed on a bottom and inner walls of the contact hole. A cobalt silicide layer is formed at the bottom of the contact hole while forming a titanium layer on the cobalt layer. A plug is formed on the titanium layer so as to fill the contact hole.

Methods for forming a metal contact in a semiconductor device in which an ohmic layer is formed while forming a barrier metal layer

A metal layer is formed on an integrated circuit device including forming an insulating layer on an integrated circuit substrate. A contact hole is formed by selectively etching the insulating layer to thereby partially expose the substrate. A metal layer including tantalum nitride is formed on the insulating layer including the contact hole using a tantalum precursor including a tantalum element and at least one bonding element that is chemically bonded to the tantalum element. A part of the at least one bonding element include at least one ligand bonding element that is ligand-bonded to the tantalum element. Forming the metal layer may include removing at least some of the ligand bonded elements with a removing gas that is substantially free of hydrogen radicals. The metal layer may be formed using a chemical vapor deposition (CVD) or an atomic layer deposition (ALD) process. A copper or other metal layer may be deposited on the metal layer including tantalum nitride.

Methods for forming a metal layer on a semiconductor

Methods of forming a metal layer in integrated circuit devices using selective electroplating in a recess are disclosed. In particular, a recess is formed in a surface of an insulating layer. The recess has a side wall inside the recess, a bottom inside the recess, and an edge at a boundary of the surface of the insulating layer and the side wall. A selective electroplating mask is formed on the side wall to provide a covered portion of the side wall and an exposed portion of the side wall. The exposed portion of the side wall can be electroplated with a metal. Related conductive contacts are also disclosed.

Methods of forming metal layers in integrated circuit devices using selective deposition on edges of recesses

After a processing chamber is used to deposit a refractory metal film on a substrate, the chamber is plasma-treated with a gas including either nitrogen and/or hydrogen and in-situ cleaned. By plasma-treating the chamber with a gas including nitrogen, the refractory metal film that forms on interior surfaces of the chamber during substrate processing is nitrided. The nitrided refractory metal film can be removed from the chamber during the in-situ cleaning. By plasma-treating the chamber with a gas including hydrogen, reaction by-products generated in the chamber is diluted removed. The chamber may be plasma-treated in a gas ambient including both nitrogen and hydrogen. Also, the plasma treatment may be performed before and after the in-situ cleaning.

Method of cleaning a chemical vapor deposition chamber

The present invention discloses a method of manufacturing a semiconductor device having an upper capacitor electrode and a node resistor, including depositing a thin film at a first deposition rate on an edge portion of a wafer and at a second deposition rate on a central portion of the wafer to form the upper capacitor electrode and the node resistor, thereby improving step coverage of the upper capacitor electrode while simultaneously improving resistance distribution of the node resistor.

Method of manufacturing a semiconductor device using a two-step deposition process

Methods of forming metal layers in integrated circuit devices using selective deposition on edges of recesses and conductive contacts so formed

A selective metal layer formation method, a capacitor formation method using the same, and a method of forming an ohmic layer on a contact hole and filling the contact hole using the same, are provided. A sacrificial metal layer is selectively deposited on a conductive layer by supplying a sacrificial metal source gas which deposits selectively on a semiconductor substrate having an insulating film and the conductive layer. Sacrificial metal atoms and a halide are formed, and the sacrificial metal layer is replaced with a deposition metal layer such as titanium Ti or platinum Pt, by supplying a metal halide gas having a halogen coherence smaller than the halogen coherence of the metal atoms in the sacrificial metal layer. If such a process is used to form a capacitor lower electrode or form an ohmic layer on the bottom of a contact hole, a metal layer can be selectively formed at a temperature of 500&deg; C. or lower.

Method of forming selective metal layer and method of forming capacitor and filling contact hole using the same

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Seoul, South Korea

Sang-bum Kang