Micron Technology Incorporated

Sandra Tagg

Fred D Fishburn

Kevin J Torek

Todd R Abbott

Terrence B McDaniel

Amy Weatherly

Donald L Yates

Janos Fucsko

Gundu M Sabde

Prashant Raghu

Robert J Hanson

Niraj B Rana

Patrick M Flynn

Kyle Grant

Yiping Wang

Methods of forming a microelectronic device includes forming a preliminary stack structure including blocks separated by slots, each block including: tiers each including insulative material and sacrificial material; and live contact openings and support contact openings extending completely through the tiers. A first liner and a second liner are formed over surfaces of the preliminary stack structure. Portions of the second liner and the first liner within the support contact openings are removed without removing additional portions of the second liner and the first liner within the slots and the live contact openings. Fill material is formed within the slots, the live contact openings, and the support contact openings to form sacrificial slot structures, sacrificial contact structures, and support contact structures. The sacrificial contact structures are replaced with conductive contact structures. The sacrificial slot structures are removed, and the sacrificial material of the tiers is replaced with conductive material.

Methods of forming microelectronic devices including support contact structures, and related microelectronic devices, memory devices, and electronic systems

Some embodiments include methods of treating semiconductor substrates. The substrates may be exposed to one or more conditions that vary continuously. The conditions may include temperature gradients, concentration gradients of one or more compositions that quench etchant, pH gradients to assist in removing particles, and/or concentration gradients of one or more compositions that assist in removing particles. The continuously varying conditions may be imparted by placing the semiconductor substrates in a bath of flowing rinsing solution, with the bath having at least two feed lines that provide the rinsing solution therein. One of the feed lines may be at a first condition, and the other may be at a second condition that is different from the first condition. The relative amount of rinsing solution provided to the bath by each feed line may be varied to continuously vary the condition within the bath.

Methods of treating semiconductor substrates, methods of forming openings during semiconductor fabrication, and methods of removing particles from over semiconductor substrates

A photoresist processing method includes treating a substrate with a sulfur-containing substance. A positive-tone photoresist is applied on and in contact with the treated substrate. The method includes selectively exposing a portion of the photoresist to actinic energy and developing the photoresist to remove the exposed portion and to form a photoresist pattern on the substrate. The treating with a sulfur-containing substance reduces an amount of residual photoresist intended for removal compared to an amount of residual photoresist that remains without the treating.

Photoresist processing methods

Methods for forming memory devices and integrated circuitry, for example, DRAM (dynamic random access memory) circuitry, structures and devices resulting from such methods, and systems that incorporate the devices are provided.

Methods of forming conductive contacts

Methods for forming memory devices and integrated circuitry, for example, DRAM circuitry, structures and devices resulting from such methods, and systems that incorporate the devices are provided.

Low resistance peripheral local interconnect contacts with selective wet strip of titanium

Methods for forming memory devices and integrated circuitry, for example, DRAM circuitry, structures and devices resulting from such methods, and systems that incorporate the devices are provided. In some embodiments, the method includes forming a metallized contact to an active area in a silicon substrate in a peripheral circuitry area and a metallized contact to a polysilicon plug in a memory cell array area by forming a first opening to expose the active area at the peripheral circuitry area, chemical vapor depositing a titanium layer over the dielectric layer and into the first opening to form a titanium silicide layer over the active area in the silicon substrate, removing the titanium layer selective to the titanium silicide layer, forming a second opening in the dielectric layer to expose the polysilicon plug at the memory cell array area, and forming metal contacts within the first and second openings to the active area and the exposed polysilicon plug.

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Boise, ID, United States of America

Sandra Tagg