Micron Technology Incorporated

Aptina Imaging Corporation

Round Rock Research, LLC

Photobit Corporation

Sandor L Barna

Eric R Fossum

Giuseppe Rossi

Kwang-Bo Cho

Roger Panicacci

Alex Krymski

Yibing Michelle Wang

Alexander I Krymski

Igor Subbotin

Michael Kaplinsky

Daniel A Van Blerkom

Barmak Mansoorian

Chiajen Lee

Andrew M Lever

Taehee Cho

Anders Andersson

Scott Patrick Campbell

Lin Ping Ang

Steve Huang

Gary E Slayton

Guy Moffat

Zeynep M Toros

Gennady Agranov

Guiseppe Rossi

Daniel Van Blerkam

An image sensor system using offset analog to digital converters. The analog to digital converters require a plurality of clock cycles to carry out the actual conversion. These conversions are offset in time from one another, so that at each clock cycle, new data is available.A CMOS image sensor converts successive analog signals, representing at least a portion of an image, into successive digital signals using an analog to digital circuit block. Multiple clock cycles may be used by the circuit block to fully convert an analog signal into a corresponding digital signal. The conversion of one analog signal into a corresponding digital signal by the circuit block may be offset in time and partially overlapping with the conversion of a successive analog signal into its corresponding successive digital signal by the circuit block.

Analog to digital conversion for a CMOS imager

An image sensor system using offset analog to digital converters. The analog to digital converters require a plurality of clock cycles to carry out the actual conversion. These conversions are offset in time from one another, so that at each clock cycle, new data is available.A system includes a CMOS active pixel image sensor having an array for photoreceptors to convert an image into an analog signal. The CMOS image sensor converts the analog signal into a digital signal using a pipelined analog to digital converter.

Method and apparatus for operating a CMOS imager having a pipelined analog to digital converter

Method and apparatuses processing pixel values from a captured image include receiving an array of digital pixel values corresponding to a captured image, and computing a rolling sum of the array of pixel values. Computing a rolling sum includes selecting successive groupings of the pixel values, each grouping comprising N&#xd7;M pixel values, summing pixel values in each of the successive groupings, and forming an output image using the summed pixel values.

Method and apparatus for improving low-light performance for small pixel image sensors

An imager with a switch circuit located between, and connected to, the pixel array and associated readout chains. In one embodiment the switch is located within the column sample and hold circuitry; in another embodiment the switch is located between the column sample and hold circuitry and the readout chains. The switch circuit ensures that signals from the column sample and hold circuitry are directed to enabled readout chains, which allows selective enabling/disabling of readout chains. By disabling readout chains, the imager's power consumption is reduced.

Power savings with multiple readout circuits

Circuits, methods, and systems are disclosed in which a current is provided to compensate for spurious current while receiving signals through a line. For example, the spurious current can be sensed and the compensating current can be approximately equal to the sensed spurious current. The spurious current could include photocurrent from a bright light, and the compensating current can prevent bright light effects.

Providing current to compensate for spurious current while receiving signals through a line

An active pixel sensor (APS) that includes circuitry to eliminate artifacts in digital images. The APS includes a comparator for comparing a signal level from a pixel to an adjusted saturation voltage to determine if the pixel is saturated. If the pixel is saturated, an associated saturation flag is stored and used to replace the signal from the pixel with a maximum value corresponding to a brightest pixel in the image.

Technique for flagging oversaturated pixels

An image sensor includes pixels each of which is designed to transfer charge, accumulated in a photoactive region of the pixel during a first period, through a second active region of the pixel to a power supply node, and to transfer charge, accumulated in the photoactive region during a second period, through the second active region to a sense node in the pixel. Passing charge through the second active region prior to transferring it either to the power supply node or the sense node can help reduce fixed pattern noise. The image sensor can be operated in snap-shot mode.

Active pixel sensor with reduced fixed pattern noise

The invention provides a new method and apparatus for NTSC and PAL image sensors which employs fusion of adjacent row pixel charge samples to generate image data for a row. A variety of fusion schemes are possible for fusing the pixel signals from the adjacent rows. The rows of pixels are scanned so that each scan takes an odd row signal sample and, in some cases, an adjacent even row signal sample when specified conditions are met. One sampled row of the two adjacent rows integrate an image with a first integration period while the other adjacent row integrates an image with a second integration period.

High intrascene dynamic range NTSC and PAL imager

A system of taking images of different sensitivities at the same time uses both an image sensor, and an auxiliary part to the image sensor. The image sensor element can be a photogate, and the auxiliary part can be the floating diffusion associated with the photogate. Both the photogate and the floating diffusion accumulate charge. Both are sampled at different times. The floating diffusion provides a lower sensitivity amount of charge than the photogate itself. The system can have a photogate and floating diffusion in each pixel along with a select transistor, a reset transistor, and a follower transistor. All of this circuitry can be formed of CMOS for example. The system can also operate in a column/parallel mode, where each column of the photo sensor array can have a column signal processor which samples and holds the reset signal, the floating diffusion signal and the photogate signal.

Dual sensitivity image sensor

An image sensor system using offset analog to digital converters. The analog to digital converters require a plurality of clock cycles to carry out the actual conversion. These conversions are offset in time from one another, so that at each clock cycle, new data is available.Systems are disclosed in which an image sensor converts an analog signal into a digital signal using a pipelined analog to digital converter.

Apparatus for operating a CMOS imager having a pipelined analog to digital converter

A frame shutter apparatus comprising a controller for controlling multiple groups of pixels and for reading out values corresponding to the charge collected by different groups of pixels at different times. A method of reading out multiple groups of pixels is provided wherein values corresponding to the charge collected by one group of pixels is readout at a different time than the values corresponding to the charge collected by another group of pixels.

Frame shuttering scheme for increased frame rate

An image sensor system using offset analog to digital converters. The analog to digital converters require a plurality of clock cycles to carry out the actual conversion. These conversions are offset in time from one another, so that at each clock cycle, new data is available.

Method for operating a CMOS imager having a pipelined analog to digital converter

The present invention provides an improved column readout circuitry and method of operation which minimizes substrate and other common mode noise during a read out operation. The circuit improves the consistency of the pixel to pixel output of the pixel array and increases the dynamic range of the pixel output. This is accomplished by obtaining a differential readout of the reset signal and integrated charge signal from a desired pixel along with the reset signal and charge signal from a reference circuit. In this manner common mode noise can be minimized by a combination of signals from the desired and reference pixels in the sample and hold aspect of the column circuitry. In one exemplary embodiment of the invention, a 3T pixel arrangement is used. In another exemplary embodiment, a 4T arrangement is used. Additional exemplary embodiments provide differential column readout circuitry that can be used with any two signal sources.

Differential column readout scheme for CMOS APS pixels

A frame shutter type device provides a separated well in which the storage node is located. The storage node is also shielded by a light shield to prevent photoelectric conversion.

Growing community of inventors

Pasadena, CA, United States of America

Sandor L Barna