Qualcomm Incorporated

Sandeep Urgaonkar

Shailesh Maheshwari

Thomas Klingenbrunn

Mathias Kohlenz

Idreas Mir

Irfan Anwar Khan

Srividhya Krishnamoorthy

Tim Liou

Sathyanarayan Madhusudan

Amir Aminzadeh Gohari

Uppinder Singh Babbar

Bao Vinh Nguyen

Daisuke Terasawa

Alok Mitra

Vaibhav Kumar

Madhusudan Sathyanarayan

Iain Finlay

Mohammed M Rumi

Gautam Sheoran

Aspects of the present disclosure provide methods and apparatus for offloading checksum processing in a user equipment (UE) (e.g., from an application processor to a modem processor). Such offloading may speed up packet processing, increase data rate, and/or free up resources of the application processor for other tasks.

Methods and apparatus for offloading checksum processing

Efficient data processing apparatus and methods include hardware components which are pre-programmed by software. Each hardware component triggers the other to complete its tasks. After the final pre-programmed hardware task is complete, the hardware component issues a software interrupt.

Data mover moving data to accelerator for processing and returning result data based on instruction received from a processor utilizing software and hardware interrupts

Multiple memory pools are defined in hardware for operating on data. At least one memory pool has a lower latency that the other memory pools. Hardware components operate directly on data in the lower latency memory pool.

Apparatus and method for memory management and efficient data processing

Incoming data frames are parsed by a hardware component. Headers are extracted and stored in a first location along with a pointer to the associated payload. Payloads are stored in a single, contiguous memory location.

Apparatus and method for efficient memory allocation

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San Diego, CA, United States of America

Sandeep Urgaonkar