Texas Instruments Corporation

Sandeep Shylaja Krishnan

Tallam Vishwanath

Barry Jon Male

Paul Merle Emerson

Akshay Yashwant Jadhav

Rajat Chauhan

Joseph Alan Sankman

A packaged integrated circuit (IC) includes a leadframe including a die pad. The packaged IC also includes a first circuit on the die pad, the first circuit having a region. The packaged IC also includes a second circuit on the first circuit, the second circuit being spaced from the region by a gap. The packaged IC also includes an attachment layer between the first and second circuits, the attachment layer and the first and second circuits enclosing at least a part of the gap over the region. The packaged IC also includes a mold compound encapsulating the first and second circuits, the attachment layer, and the at least part of the gap.

Semiconductor package with top circuit and an IC with a gap over the IC

A bandgap reference circuit includes first through fourth bipolar junction transistors (BJTs). The base and collector of the first BJT are shorted together. The second BJT is coupled to the first BJT via a first resistor. The base of the third BJT is coupled to the base of the first BJT. The base and collector of the fourth BJT are coupled together and also are coupled to the base of the second BJT. A second resistor is coupled to the fourth emitter of the fourth BJT. A third resistor is coupled to the second resistor and to the emitter of the second BJT. An operational amplifier has a first input coupled to the first resistor and the collector of the second BJT, a second input coupled to the emitter of the third BJT and the collector of the fourth BJT, and an output coupled to the collectors of the first and third BJTs.

Bandgap reference with input amplifier for noise reduction

This description relates generally to piecewise temperature compensation. In an example, a circuit includes a knee code selector that can be configured to set a knee point temperature for a correction current responsive to a respective knee point temperature code of knee point temperature codes and a respective temperature sense signal of temperature sense signals. The circuit includes an output circuit that can be configured to provide the correction current responsive to the respective temperature sense signal and temperature voltages, and a trim digital to analog converter (DAC) that can be configured to provide a piecewise compensation current responsive to the correction current and a respective trim code of trim codes.

Piecewise compensation for voltage reference temperature drift

A bandgap reference circuit includes an amplifier, a first transistor, a second transistor, a third transistor, a first resistor, and a second resistor. The amplifier is configured to generate a bandgap voltage. The first transistor is coupled to the amplifier, and passes a first PTAT current. The second transistor is coupled to the amplifier, and passes a second PTAT current. The first resistor is coupled to the amplifier and the second transistor, and passes the second PTAT current to the second transistor. The third transistor is coupled to the amplifier, and passes a third PTAT current that bypasses the first resistor and the second transistor. The second resistor is coupled to the first transistor, the second transistor, and the third transistor, and passes the first PTAT current, the second PTAT current, and the third PTAT current.

Bandgap reference circuit

Described embodiments include an integrated circuit for temperature gradient compensation of a bandgap voltage. A bandgap core circuit has a bandgap feedback input, a bandgap adjustment input and a bandgap reference output. A resistor is coupled between the bandgap adjustment input and a ground terminal. An offset and slope correction circuit has an offset correction output that is coupled to the bandgap adjustment input. A signal at the offset correction output is trimmed at an ambient temperature. A thermal error cancellation (TEC) circuit has a TEC output coupled to the bandgap adjustment input. The TEC circuit includes first and second temperature sensors that are located apart from each other. A signal at the TEC output is responsive to temperatures at the first and second temperature sensors. An amplifier has an amplifier input and an amplifier output. The amplifier input is coupled to the bandgap reference output.

Compensation of thermally induced voltage errors

A packaged integrated circuit (IC) includes a leadframe including a die pad and leads around the die pad, an analog IC die having first bond pads on its active top side, and a second circuit including second circuit bond pads attached to the analog IC die by an attachment layer configured as a ring with a hollow center that provides an inner gap. A bottom side of the analog IC or the second circuit is attached to the die pad. Bond wires couple at least some of the first bond pads or some of the second circuit bond pads to the leads, and there is a second coupling between others of the second circuit bond pads and others of the first bond pads. A mold compound is for encapsulating the second circuit and the analog IC.

In an example method of trimming a voltage reference circuit, the method includes: setting the circuit to a first temperature; trimming a first resistor (R) of a differential amplifier stage of the circuit; and trimming a first resistor (R) of a scaling amplifier stage of the circuit. The trimming equalizes current flow through the differential amplifier stage and the scaling amplifier stage. The method includes: trimming a second resistor (R) of the scaling amplifier stage to set an output voltage of the circuit to a target voltage at the first temperature; setting the circuit to a second temperature; and trimming a second resistor (R) of the differential amplifier stage, a third resistor (R) of the scaling amplifier stage, and a fourth resistor (R) of the scaling amplifier stage to set the output voltage of the circuit to the target voltage at the second temperature.

Two-temperature trimming for a voltage reference with reduced quiescent current

An electronic device includes a bandgap reference circuit having an output, and a bias input; a piecewise compensation circuit having an output coupled to the bias input, and an input; and a piecewise compensation current generator having an output coupled to the input of the piecewise compensation circuit, and a knee point temperature adjustment circuit coupled to the output of the piecewise compensation current generator.

Piecewise compensation method for ultra-low temperature drift

A voltage reference circuit includes a bandgap circuit and a temperature compensation circuit. The temperature compensation circuit includes a first trim circuit, a second trim circuit, and a resistive digital-to-analog converter. The resistive digital-to-analog converter is coupled to the first trim circuit, the second trim circuit, and the bandgap circuit. The resistive digital-to-analog converter is configured to generate a temperature compensation voltage, and to provide the temperature compensation voltage to the bandgap circuit.

Temperature drift compensation

In some examples, a bandgap reference circuit comprises a first bandgap pair having multiple first diodes and a first resistor positioned between the multiple first diodes. The circuit also comprises a second bandgap pair having multiple second diodes and a second resistor positioned between the multiple second diodes, the second bandgap pair being an inverted form of the first bandgap pair. The circuit further comprises a scaling resistor coupled to the first and second bandgap pairs. The circuit still further comprises an operational amplifier coupled to the first and second bandgap pairs.

Bandgap reference circuit with inverted bandgap pairs

A method and system for sub-circuit pattern recognition in integrated circuit design is disclosed. In one embodiment, a method for recognizing a pattern circuit in a target circuit, includes encoding the pattern circuit and the target circuit by processing a first netlist of the pattern circuit and a second netlist of the target circuit, generating a cross-linked data structure based on attributes and connectivity information of at least two devices and at least one net from the first netlist, and identifying an instance of the pattern circuit in the target circuit based on an associative mapping between the pattern circuit and a sub-circuit of the target circuit using a device integer array and a net integer array. Each of the first netlist and the second netlist is based on the at least two devices and the at least one net connecting the at least two devices.

Growing community of inventors

Kerala, India

Sandeep Shylaja Krishnan