Other

Saankhya Labs Pvt. Ltd.

Vayavya Labs Private Limited

Cadence Design Systems, Inc.

Tejas Networks Limited

Sandeep Pendharkar

Venugopal Kolathur

Parag Naik

Karthick Gururaj

Anindya Saha

Uma Bondada

David Guoqing Zhang

Arindam Chakraborty

Erik S Panu

Hemant Mallapur

Susmit Kumar Datta

Ragesh Thottathil Ramachandran

Makarand Kulkami

Preetham Uthaiah

Deepak Samaga

Sudarshan V

Yogesh Singh

Deepanjan Kar

Shrinivas Nagaraddi

Someshwar Dk

Srivatsan Raghavan

Sangamesh O Shetty

A virtual Radio Access Network (vRAN) system () for provisioning a virtual Radio Access Network (RAN) that is portable across one or more RAN hardware platforms is provided. The virtual Radio Access Network (vRAN) system () includes a waveform development kit (WDK) (), and a waveform execution environment (). The waveform development kit () defines at least one portable Radio Access Network (RAN) application into a form that is instantiated on a RAN hardware (). The waveform execution environment () (i) monitors real-time schedulable resources in real-time, and (ii) collects one or more statistics and monitors the one or more statistics for network automation. The waveform execution environment () includes a RAN hypervisor () that virtualizes at least one attribute of a spectral resource required to provision the RAN that is portable across at least one hardware platform of the one or more RAN hardware platforms in the RAN hardware.

System and method for provisioning a portable virtual RAN across a plurality of RAN hardware platforms

A system and method for switching one or more User Equipment (UEs)A-N from a unicast mode to a broadcast or multicast mode to transmit a streaming media content to the UEsA-N is provided. The system includes, an Over-the-top (OTT) platform, a CDN, the UEsA-N, a cellular core network, one-to-many offload core, an analytics engine, a database, one-to-many transmitter, a real time switching module, a Cellular base stationand a user specified rules module. The analytics enginecontinuously analyzes real-time and historical data stored in the databaseto identify the UEsA-N that receive a streaming media content through the unicast mode and the streaming media content to be offloaded. An offload is a process by which certain portions of the streaming media content is shifted from the unicast mode to the broadcast or multicast mode.

System and method for out-of-order transmission stream of content via ambient intelligent one-to-many transmission mode

A system for deploying a Radio Access Network Containerized Network Function (RAN CNF) that is portable across a plurality of RAN hardware platforms is provided. The system includes a Software Development Kit (SDK), a schedule generator and a scheduler runtime unit. The SDK enables providing a RAN functionality in a physical layer (L1) software code in a platform-independent manner as a RAN pipeline of a plurality of RAN tasks. The RAN tasks include a first and second RAN task. The first RAN task invokes an Application programming interface (API) from a plurality of Application Programming Interfaces to call to the second RAN task. The schedule generator generates a schedule for allocating a node in the RAN pipeline to one or more processing elements. The scheduler runtime unit loads the RAN tasks corresponding to nodes in the RAN pipeline, based on the schedule generated by the schedule generator.

Deploying a radio access network containerized network function (RAN CNF) that is portable across a plurality of RAN hardware platforms

A method for operating a hardware-software interface (HSI) executable specification unit by means of an executable hardware-software interface (HSI) specification for a computing device is provided. The executable HSI specification is a form of a Device Programming Specification (DPS). The HSI executable specification unit includes a HSI analyser, at least one skeletal driver and a HSI executable specification interpreter. The method includes (i) capturing at least one HSI for generating the executable HSI specification, (ii) analyzing at least one section of the DPS to determine sequences that are required for executing the executable HSI specification, (iii) parsing, using the HSI analyzer, the DPS into an intermediate form, (iv) verifying if an intermediate representation (IR) for each of the sequences to be invoked in at least one skeletal driver Application Programming Interface (API) is present and (v) translating the sequences of the DPS into at least one hardware-software interface (HSI) intermediate representation (IR).

System and method for generating an executable hardware-software interface specification

A processor-implemented method for transforming co-routines to equivalent sub-routines is provided. An input is received at a first user device from a user for a first language and a first operating environment. The first language includes the co-routines and is supported in a first hardware environment. The first language is analyzed to transform the co-routines of the first language into the sub-routines of a second language for implementing the co-routines of the first language in a second hardware environment. The second hardware environment supports the sub-routines of the second language in a second operating environment by determining automatic variables for persistent variables and non-persistent variables, transforming the persistent variables and the non-persistent variables into the sub-routines of the second language, determining return statements and yield statements in the co-routines, and translating the co-routines of the first language into the sub-routines of the second language and the second operating environment.

System and method for transforming co-routines to equivalent sub-routines

A system and a processor implemented method for customizing an archive of a device driver generator tool for a user is provided. The system includes (i) a memory unit that stores a database, and a set of modules, and (ii) a processor. The template file obtaining module is configured to obtain information associated with the template files and template files. The configuration file obtaining module is configured to obtain information associated with the configuration files and configuration files. The archive configuration file verification module is configured to verify whether an archive for the configuration files and the template files is pre-existing in the database. The archive file appending module is configured to (i) append the template files and the configuration files to the archive pre-existing in the database. The archive file appending module generates the archive for template files and configuration files upon the archive not pre-existing in the database.

System and method for customizing archive of a device driver generator tool for a user

A system and method for automatically generating device driver codes for a device model based on an operation of said device model in verification environments is provided. The System includes a computing device. The computing device includes a device programming specification receiving module, a run time specification parsing module, a verification environment determination module and a driver generation module. The device programming specification receiving module receives at least one device programming specification aspects associated with an operation of device model in verification environment to determine a type of device driver code to be generated. The run time specification parsing module parses a run time specification file that includes verification environment parameters in run time specification. The verification environment determination module determines whether the verification environment equals to a part of a simulation/emulation in run time specification. The driver generation module automatically generates device driver code in pre-determined output programming language.

System and method for automatically generating device drivers for run time environments

A computer-implemented verification system for performing a system level or a system on chip level functional verification of integrated circuit is provided. The computer-implemented system includes one or more processors and a memory storing instructions defined by one or more modules of including a scenario compiler, a verification component and a software library component. The scenario compiler receives a set of verification scenario intents including at least one of test-application intents, constraints, device-programming intents and scenario-control intents. The scenario compiler generates one or more open verification methodology (OVM) and/or universal verification methodology (UVM) compliant test bench sequences and one or more scenario software implementations based on the set of verification scenario intents. The verification component interacts with the integrated circuit using the OVM and/or UVM compliant test bench sequences. The software library component enables execution of the scenario software implementations on a processing unit core of the integrated circuit.

Computer-implemented verification system for performing a functional verification of an integrated circuit

A system for validating a hardware platform is provided. The system includes a database that stores one or more test specifications, a compiler that generates a target image based on (i) a device driver obtained from a device driver generator, (ii) a platform independent target application code, (iii) a kernel source, and (iv) a run time environment, and a software driven validation generator that analyzes the run time specification and the device programming specification and generates (i) one or more test cases based on (a) the one or more test specifications, and (b) the device programming specification, and (ii) a control software based on the test cases. The test cases include configurations that are specific to the hardware platform. The hardware platform is validated based on (i) an execution of the target image and the control software on the hardware platform, and (ii) the one or more test cases.

Hardware platform validation

A system for generating a device driver based on an archived template code using a device driver generation tool is provided. The device driver generation tool is configured to extract configuration files and template files from a template archive stored in a database, each of the files comprises high level configuration files and low level configuration files, each comprising one or more labels, parse a high-level configuration file, corresponding to a class of a device, and an operating system for which the driver is being generated, process a label from the high-level configuration file, extract template code from the template files to obtain an extracted template code, and generate a portion of the driver based on the extracted template code when a block label is identified, parse a low-level configuration file, and generate the driver using a first specification and a second specification when the label is a file label.

System and method for generating a device driver using an archive of template code

In a system and method that simulates a design including a third party IP component, a driver for the IP component is compiled and executed in a workstation implementing the simulation platform for the design. The source code for the driver is modified to allow the simulation to reroute certain functions that would cause the simulator to hang until an event occurs that would unlock the simulation. The rerouting includes storing instruction location, state information, and any other context information needed to restore a paused function. The saved information is stored in a stack that is traversed upon detection of the event.

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Bengaluru, India

Sandeep Pendharkar