Ati International Srl

Other

Ati Technologies Ulc

Ipventure, Inc.

Advanced Silicon Technologies LLC

Sandeep Nijhawan

Stephen C Purcell

John S Yates, Jr

Matthew F Storch

Dale R Jurich

Korbin S Van Dyke

Sunil Bhargava

Justin C Miller

Ajit Ramachandra Mayya

Christopher Angel Kantarjiev

Joyo Wijaya

Shalesh Thusoo

Niteen Aravind Patkar

Louis H Borders

Denis Gulsen

Margaret Sue Lloyd

Andre Kruglikov

Gurjeet Singh Saund

David L Reese

T R Ramesh

Paul H Hohensee

Paul Campbell

Michael C Adler

A multi-instruction set architecture (ISA) computer system includes a computer program, a first processor, a second processor, a profiler, and a translator. The computer program includes instructions of a first ISA, the first ISA having a first complexity. The first processor is configured to execute instructions of the first ISA. The second processor is configured to execute instructions of a second ISA, the second ISA being different than the first ISA and having a second complexity, wherein the second complexity is less than the first complexity. The profiler is configured to select a block of the computer program for translation to instructions of the second ISA, wherein the block includes one or more instructions of the first ISA. The translator is configured to translate the block of the first ISA into instructions of the second ISA for execution by the second processor.

Apparatus for executing programs for a first computer architecture on a computer of a second architecture

Executing programs coded in an instruction set of a first computer on a computer of a second, different architecture. An operating system maintains an association between each one of a set of concurrent threads and a set of computer resources of the thread's context. Without modifying a pre-existing operating system of the computer, an entry exception is establishing to be raised on each entry to the operating system at a specified entry point or on a specified condition. The entry exception has an associated entry handler programmed to save a context of an interrupted thread and modify the thread context before delivering the modified context to the operating system. A resumption exception is established to be raised on each resumption from the operating system complementary to one of the specified entries. The resumption exception has an associated exit handler programmed to restore the context saved by a corresponding execution of the entry handler. The entry exception, exit exception, entry handler, and exit handler are cooperatively designed to maintain an association between a one of the threads and an extended context of the thread through a context change induced by the operating system, the extended context including resources of the computer associated with the thread beyond those resources whose association with the thread is maintained by the operating system.

Apparatus for executing programs for a first computer architechture on a computer of a second architechture

Computer implemented methods and apparatus for determining availability information for a first one of a plurality of products for publication via a wide area network. The availability information is calculated with reference to a delivery date, an available number of units, and a reserved number of units, the delivery date having been specified by a user via the network, the available number of units having been determined with reference to inventory information, and the reserved number of units having been determined with reference to current order information.

Real-time display of available products over the internet

Methods and apparatus for scheduling delivery of an order via a wide area network. A delivery interface is generated in which a plurality of delivery windows are presented. The delivery interface is transmitted to a remote platform via the wide area network. In response to selection of a first one of the plurality of delivery windows, it is determined whether the order may be delivered in the first delivery window. Where it is determined that the order may be delivered in the first delivery window, delivery of the order is scheduled in the first delivery window.

Scheduling delivery of products via the internet

Executing programs for a first computer architecture on a computer of a second architecture

Methods and apparatus for scheduling delivery of an order via a wide area network. A computer system associates a customer point value with each customer according to a customer point system. The customer point values is determined with reference to customer order data. The computer system then divides the customers into customer groups, each of which has a range of customer point values. The system determines an actual capacity allocation distribution among the customer groups based on the customer order data. The system adjusts the range of customer point values for customer groups to cause the actual capacity allocation distribution to converge to a target capacity allocation distribution.

A computer concurrently executes a first operating system coded in a RISC instruction set and a second operating system coded in a CISC instruction set. When an exception is raised while executing a program coded in the RISC instruction set, an execution thread may be initiated under the CISC operating system. The exception may be delivered to the initiated thread for handling by the CISC operating system.

System for delivering exception raised in first architecture to operating system coded in second architecture in dual architecture CPU

The present invention provides an apparatus and a method for variable size pages using fixed size TLB (Translation Lookaside Buffer) entries. In one embodiment, an apparatus for variable size pages using fixed size TLB entries includes a first TLB for fixed size pages and a second TLB for variable size pages. In particular, the second TLB stores fixed size TLB entries for variable size pages. Further, in one embodiment, an input of an OR device is connected to the second TLB to provide a cost-effective and efficient implementation for translating linear addresses to physical addresses using fixed size TLB entries stored in the second TLB.

Apparatus and a method for variable size pages using fixed size translation lookaside buffer entries

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San Jose, CA, United States of America

Sandeep Nijhawan