Zetagig Inc.

Other

Sandeep Kumar Gupta

Lawrence Taylor Waugh

Apparatuses, methods, and systems for power supply stacking of an array of devices are disclosed. For an embodiment, each device is specified by a location (i,j), each device includes a Vdd terminal, and a Vss terminal. For an embodiment, the Vss terminal of each of the devices in the first majority of the devices at location (i,j), is connected to the Vdd terminal of the device at location (i−1,j), wherein the potential of the Vss terminal of the each device at any location (1,j+1) is higher than the potential of the Vss terminal for another device at location (1,j) by a voltage X, for j=1:M−1, wherein a sum of all Xvoltages for j=1:(M−1) is greater than 0.25*VDD.

Apparatuses, methods, and systems for an array of devices

Apparatuses, and methods, for digital cells power reduction are disclosed. For an embodiment, a first plurality of digital logic cells are directly connected to a Vdd terminal and a Vss terminal that have a potential difference of VDD, a second plurality of digital logic cells being directly connected to a Vdd_R terminal and a Vss_R terminal, wherein a potential difference between the Vdd_R terminal and the Vss terminal is (VDD−X1), and a potential difference between the Vss_R terminal and the Vss terminal is X2, wherein at least one digital logic cell has at least one of (a) an input connected to an output of at least one digital logic cell of the second plurality, or (b) an output connected to an input of at least one digital logic cell of the second plurality. Vdd, Vdd_R and Vss_R terminal voltages can be generated by an array of devices.

Mixed signal device with different pluralities of digital cells

Apparatuses, methods, and systems for power supply stacking of an array of devices are disclosed. For an embodiment, each device is specified by a location (i,j), each device includes a Vdd terminal, and a Vss terminal, at least a plurality of the devices further including at least one other V_Terterminal. For an embodiment, the Vss terminal of the device at location (i,j), for i=2:N, j=1:M, is connected to the Vdd terminal of the device at location (i−1,j) resulting in a voltage between the Vdd and Vss terminals of at least a majority of the devices in the array to be a substantially same voltage VDD, wherein the potential of the Vss terminal of the each device at any location (i,j+1) is generated to be higher than the potential of the Vss terminal for another device at location (i,j) by a voltage X, for i=1:N, j=1:M−1.

Systems, methods, and apparatuses for an array of devices

Apparatuses and methods for an array of devices

A method and system is described for managing the development of software source code, and in addition, collecting useful metrics about the development process. A first source code is provided in a desired state. The desired state may be the requirement that the source code can be built or the desired state may be the requirement that the source code can be built and pass one or more tests. A second source code is then received. The second source may be a modified copy of the source code. It is then determined whether the second source code is in the desired state, and the first source code is updated using the second source code in response to the second source code being in the desired state. Metrics that may be collected include: the name of a task, time to complete the task, line of code involved, etc.

Growing community of inventors

Sunny Isles Beach, FL, United States of America

Sandeep Kumar Gupta