Marvell International Limited

Marvellworld Trade Ltd.

Toshiba Corporation

Sandeep Karmarkar

Arvind Pruthi

Jagadish Kumar Mukku

Hy Dinh Vu

Shailesh Shiwalkar

Anil Goyal

Shekhar S Deshkar

Ram Kishore Johri

Kanishk Rastogi

Paresh Phadke

A cache system for a storage device includes a solid state drive (SSD), a random access memory (RAM), and a cache control device. The cache control device is configured to: retrieve data from the storage device in response to a request to read data from the storage device, store at least some of the data in one or both of (i) the SSD and (ii) the RAM, when storing the at least some of the data to the RAM, write to the RAM non-sequentially with respect to a memory space of the RAM, and when storing the at least some of the data in the SSD, write to the SSD sequentially with respect to a memory space of the SSD. The cache control device comprises an SSD interface device configured to allocate memory for storing data in the SSD sequentially with respect to the memory space of the SSD.

Cache system using solid state drive

A memory system includes a cache module configured to store data. A duplicate removing filter module is separate from the cache module. The duplicate removing filter module is configured to receive read requests and write requests for data blocks to be read from or written to the cache module, selectively generate fingerprints for the data blocks associated with the write requests, selectively store at least one of the fingerprints as stored fingerprints and compare a fingerprint of a write request to the stored fingerprints.

Memory systems including a duplicate removing filter module that is separate from a cache module

Systems, methods, and other embodiments associated with a lookup structure for a large block cache are described. According to one embodiment, at least two blocks of data are stored in a cache. A lookup entry is constructed that describes the at least two blocks of data. The lookup entry includes block specific information that describes individual blocks of the at least two blocks of data. The lookup entry is stored in the lookup structure.

Lookup structure for large block cache

A system including a write module to receive first data for writing over second data stored on a first member of a stripe of a RAID. A read module reads the second data and first parity from a SSD or the RAID. Before receiving third data for writing over fourth data stored on a second member of the stripe, the read module reads the fourth data from the second member and stores the fourth data in the SSD. A parity module generates second parity based on the first data, the second data, and the first parity. The write module writes the second parity on the SSD. On receiving the third data, the parity module generates the third parity based on the third data, the fourth data, and the second parity.

Solid-state disk cache-assisted redundant array of independent disks

A cache system for a storage device includes (i) one or more solid state drives (SSDs), (ii) one or more random access memories (RAMs), and (iii) a cache control device. The cache control device caches at least some of first data that is to be written to the storage device, and caches at least some of second data that is retrieved from the storage device. When caching first data or second data in one of the one or more RAMs, the cache control device writes to the one RAM non-sequentially with respect to a memory space of the one RAM. When caching first data or second data in one of the one or more SSDs, the cache control device writes to the one SSD sequentially with respect to a memory space of the one SSD.

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, can perform data caching. In some implementations, a method and system include receiving information that includes a logical address, allocating a physical page in a non-volatile memory structure, mapping the logical address to a physical address of the physical page, and writing, based on the physical address, data to the non-volatile memory structure to cache information associated with the logical address. The logical address can include an identifier of a data storage device and a logical page number.

Data caching in non-volatile memory

Methods, apparatus, and systems, including computer programs encoded on a computer storage medium, manage an address space. In some implementations, a method includes managing an allocation data structure for a memory, wherein the allocation data structure indicates groupings of memory space, each of the groupings having a different associated integer, and each of the groupings serving memory space in portions equal to a unit of memory space allocation times the associated integer for that grouping; receiving a request for allocation within the memory, wherein the request has an associated number of the unit of memory space allocation; and selecting one of the groupings from which to serve the request for allocation within the memory based on the associated number in comparison with values obtained using the different associated integers as an exponent.

Low overhead memory space management

A system includes a write module, a read module, and a parity module. The write module is configured to modify first user data stored on a first member of a redundant array of independent disks (RAID) using second user data. The read module is configured to read the first user data and first parity data corresponding to the first user data from a solid-state disk associated with the RAID if at least one of the first user data and the first parity data are stored on the solid-state disk, or from the RAID if the at least one of the first user data and the first parity data are not stored on the solid-state disk. The parity module is configured to generate second parity data based on the first user data, the second user data, and the first parity data.

Solid-state disk cache assisted redundant array of independent disks

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, to manage an address space for large caches are described. In some implementations, a method includes receiving data to be cached in a cache address space associated with a cache memory. The cache address space includes two or more designated portions of the cache address space, such that each of the two or more designated portions has an associated minimum amount of data allowed to be cached therein. Additionally, the respective minimum amounts of the two or more designated portions are different from each other. The method also includes selecting a cache address for caching the received data from one of the two or more designated portions of the cache address space that has an associated minimum amount of data allowed to be cached therein being less than the received data. Further, the method includes caching the received data at the selected cache address, and accessing at least a subset of the data cached at the selected cache address.

Growing community of inventors

Pune, India

Sandeep Karmarkar