Winbond Electronics North America Corporation

San L Lin

Hwa-Jyun Chen

A sensor circuit is disclosed for use with a clock circuit providing a periodic timing signal to a clock output, wherein a timing reference for the periodic timing signal is provided by a crystal connected between a crystal input and a crystal output of the clock circuit, or alternatively provided by an external periodic logic signal coupled to the crystal input. The sensor circuit provides a sensor output in a first state, thereby indicating the presence of an external periodic logic signal timing reference, in response to at least a given number of large-signal voltage transitions on the crystal input within a certain period of time, and otherwise provides a second state on the sensor output, typically to indicate the presence of a crystal timing reference. Also disclosed is a clock circuit including a sensor circuit, and further including means for disabling a feedback resistor necessary for crystal operation when the timing reference is determined to be provided by an external periodic logic signal.

Sensor circuit

A comparator that may be used in data communications transmission lines, in particular, an Ethernet Twisted-Pair line. The comparator accepts as input the differential voltage from the transmission lines. The comparator uses feedback circuitry to monitor particular voltages within the comparator and adjust them as necessary to mitigate the effect of bias offset within the comparator that may result from, for instance, temperature driven device parameter variations. The comparator also minimizes the effect of power supply noise. The feedback circuitry ensures that as the comparator input differential voltage approaches zero (i.e., when the comparator outputs should switch from a high voltage to a low voltage or vice versa), the input of a comparator output amplifier is situated in the middle of the high gain region of the output amplifier, ready to quickly trigger switching of the comparator output when the comparator input differential voltage crosses zero volts. In one embodiment, the feedback circuitry comprises an operational amplifier and two resistive-capacitive structures.

Comparator with application in data communication

The invention provides a method and apparatus for precise modulation of a reference current. A current generating apparatus in accordance with the invention is provided on an integrated circuit chip and includes a series connected chain comprising in the recited order: (a) an externally-set reference current source; (b) a current-to-voltage (I/V) converter for converting the reference current into an on-chip reference voltage, V.sub.ref ; (c) a voltage-to-current (V/I) converter for converting the reference voltage V.sub.ref into an on-chip, internal reference current I.sub.iref ; (d) a single-ended, voltage-operated current switch for modulating the internal reference current I.sub.iref to produce therefrom a modulated current signal, I.sub.M ; (e) a current-driven filter which receives the modulated current signal I.sub.M and produces therefrom a filtered voltage signal, V.sub.F ; (f) a voltage-to-current (V/I) converter for converting the filtered output voltage signal V.sub.F of the filter back into a current, I.sub.F, and (g) a current multiplier for multiplying the magnitude of the current output by the V/I converter to thereby produce an output current, I.sub.OUT.

Method and apparatus for precise modulation of a reference current

A hysteresis comparator is disclosed which utilizes an on-chip bias generator, and incorporates circuitry which renders the decision voltages V.sub.P and V.sub.N insensitive to semiconductor process variations, independent of any critical reference voltages, and proportional to absolute temperature. Current sources coupled to positive and negative bias voltages are utilized to generate precise voltages across resistors to set the magnitude of V.sub.P and V.sub.N, which magnitudes are set by the ratios of like components existing within the same integrated circuit. Hysteresis comparators with precise and repeatable decision voltages can be implemented while consuming a minimum amount of semiconductor area.

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San Jose, CA, United States of America

San L Lin