Intel Corporation

Samuel Wong

Hong Jiang

Sreenath Kurupati

Ning Lu

Hiu-Fai R Chan

Brian R Nickerson

Scott W Cheng

Jonathan W Liu

Sunil B Chaudhari

Mohmad I Qurashi

CABAC coefficient decoding may be increased to two bins per clock by performing a calculation for a first bin followed by renormalization for the first bin in a first thread and performing a calculation for a second bin and renormalization for the second bin being after the first bin calculation and renormalization using a second thread different from the first thread.

Two bins per clock CABAC decoding

Context-adaptive variable length bitstream decoding performance may be improved and power consumption reduced by pushing the variable length decoding beyond one syntax element per clock pulse.

CAVLC decoder with multi-symbol run before parallel decode

A method and apparatus for hardware-based anamorphic video scaling. In one embodiment, the method includes the fetch of zero or more new input pixels according to an entry of an input control memory corresponding to a current output pixel. Once fetched, the zero or more new input pixels replace at least one stored input pixel of N, input pixels. Using the updated N, input pixels and an N, coefficient set selected according to an entry of a coefficient memory corresponding to the current output pixel, a pixel computation, such as, for example, an anamorphic scaling computation, is performed. In one embodiment, the anamorphic scaling is performed by subdividing an X&#xd7;Y pixel frame into X/M M&#xd7;Y pixel subframes. Other embodiments are described and claimed.

Apparatus and method for hardware-based video/image post-processing

A method and apparatus for hardware-base edge handling in video post-processing. In one embodiment, the method includes the identification of at least one unstored input pixel required to compute an output pixel during output pixel computation. Once identified, a pixel value is generated for the at least one unstored input pixel according to a detected edge handling mode. The generation of the pixel value for the unstored input pixel is performed, in one embodiment, if a position of the unstored input pixel is outside a pixel frame boundary. For example, in one embodiment, for output pixel computation of a scaling operation, the frame boundaries include a left (top) edge and a right (bottom) edge for which input pixels required to compute output pixels at or near the frame boundaries do not exist. Other embodiments are described and claimed.

Growing community of inventors

Santa Clara, CA, United States of America

Samuel Wong