Abb Schweiz Ag

Abb Technology Ag

Hitachi Energy Switzerland Ag

Abb Power Grids Switzerland Ag

Abb Research Ltd.

Hitachi Energy Ltd

Samuel Hartmann

Dominik Truessel

Dominik Trüssel

David Guillon

Fabian Fischer

Harald Beyer

Slavo Kicin

Didier Cottet

Olle Ekwall

Erik Doré

Ulrich Schlapbach

Milad Maleki

Franc Dugal

Lluis Santolaria

Charalampos Papadopoulos

Markus Thut

Sven Klaka

Lydia Feller

Venkatesh Sivasubramaniam

David Hajas

A power semiconductor component with power semiconductor modules connected to a cooling structure, and a cooling chamber having an inlet and outlet port, and adapted for a flow direction of a coolant substance from the inlet port to the outlet port, each of the cooling structures provided within the cooling chamber consecutively in the flow direction forming a flow resistance region in the cooling chamber, the cooling chamber comprises a bypass region connected in parallel to at least one of the flow resistance regions being closer to the inlet port, and is adapted for a flow rate of the at least one flow resistance region, which is connected in parallel to the bypass region, closer to the inlet port being smaller than a flow rate of one of the at least two flow resistance regions closer to the outlet port.

Power semiconductor component

A power semiconductor module includes a housing accommodating a power circuit with at least one power semiconductor chip, the housing providing at least two power terminals; a printed circuit board mounted to the housing and electrically connected to the power circuit for distributing auxiliary signals; and at least one auxiliary terminal mounted to the printed circuit board with a press-fit connection provided by a body of the auxiliary terminal.

Power semiconductor module

The present invention provides a power semiconductor module, including a substrate having an electric insulating main layer being provided with a structured top metallization and with a bottom metallization, wherein the top metallization is provided with at least one power semiconductor device and at least one contact area, wherein the main layer together with its top metallization and the at least one power semiconductor device is embedded in a mold compound such that the mold compound includes at least one opening for contacting the at least one contact area, and wherein power semiconductor module includes a housing with circumferential side walls, wherein the side walls are positioned above the main layer of the substrate so that the side walls are only present in a space above a plane through the main layer of the substrate.

Power semiconductor module embedded in a mold compounded with an opening

Power semiconductor module, including a base plate with at least one substrate located on the base plate, wherein an electronic circuit is provided on the at least one substrate, wherein located on the at least one substrate are electrical connectors comprising a DC+ power terminal, a DC&#x2212; power terminal and an AC power terminal and further a control connector, wherein the power semiconductor module is designed as a half-bridge module including a first amount of switching power semiconductor devices and a second amount of switching power semiconductor devices, wherein the base plate includes a contact area, a first device area and a second device area, wherein the contact area is positioned in a center of the base plate such, that the first device area is positioned at a first side of the contact area and that the second device area is positioned at a second side of the contact area, the second side being arranged opposite to the first side, wherein the DC+ power terminal, the DC&#x2212; power terminal, the AC power terminal and the control connector are positioned in the contact area, wherein the first amount of switching power semiconductor devices is positioned in the first device area and wherein the second amount of switching power semiconductor devices is positioned in the second device area, wherein all the power semiconductor devices in the first device area are located in two parallel lines being aligned parallel to the width of the base plate and wherein all the power semiconductor devices in the second device area are located in two parallel lines being aligned parallel to the width of the base plate.

A housing of a power module includes: an encasing for encasing semiconductor elements inside the housing; a power terminal area on the encasing, on which a power terminal plate is provided; an auxiliary terminal area on the encasing at a lower level than the power terminal area; and an interconnecting member with a power terminal connector part and an auxiliary terminal connector part interconnected by a spring part, the spring part is aligned besides the power terminal plate; the interconnecting member is inserted with the power terminal connector part through an opening in the encasing below the power terminal plate, such that the spring part engages the power terminal area besides the power terminal plate and runs to the auxiliary terminal area and the auxiliary terminal connector part is disposed on the auxiliary terminal area.

Interconnecting member for power module

The present application provides a power semiconductor module, including a support which carries at least one power semiconductor device, the support together with the power semiconductor device is at least partly located in a housing, the support and the power semiconductor device are at least partly covered by a sealing material, additionally to the sealing material, a protecting material is provided in the housing, the protecting material is formed from silicon gel and the protecting material at least partly covers at least one of the support, the power semiconductor device and the sealing material.

A power semiconductor module includes a first main electrode, a second main electrode and a control terminal. The power semiconductor module includes controllable power semiconductor components arranged between the first main electrode and the second main electrode. At least some of the controllable power semiconductor components are arranged in a ring arrangement, wherein the controllable power semiconductor components of the ring arrangement are arranged at least approximately along a first circular line of the ring arrangement, and a control conductor track of the ring arrangement is arranged on the first main electrode, wherein the control conductor track runs at least approximately along a second circular line of the ring arrangement, and the second circular line runs concentrically relative to the first circular line.

A semiconductor module, comprises a substrate plate; a semiconductor switch chip and a diode chip attached to a collector conductor on the substrate plate, wherein the diode chip is electrically connected antiparallel to the semiconductor switch chip; wherein the semiconductor switch chip is electrically connected via bond wires to an emitter conductor on the substrate plate providing a first emitter current path, which emitter conductor is arranged oppositely to the semiconductor switch chip with respect to the diode chip; wherein a gate electrode of the semiconductor switch chip is electrically connected via a bond wire to a gate conductor on the substrate plate providing a gate current path, which gate conductor is arranged oppositely to the semiconductor switch chip with respect to the diode chip; and wherein a protruding area of the emitter conductor runs besides the diode chip towards the first semiconductor switch chip and the first semiconductor switch chip is directly connected via a bond wire with the protruding area providing an additional emitter current path running at least partially along the gate current path. The semiconductor switch chip is a first semiconductor switch chip and the diode chip is a first diode chip, which are arranged in a first row. The semiconductor module comprises further a second row of a second semiconductor switch chip and a second diode chip attached to the collector conductor, wherein the diode chip of each row is electrically connected antiparallel to the semiconductor switch chip of the same row and the first and second rows are electrically connected in parallel. The first semiconductor switch chip is arranged besides the second diode chip and the second semiconductor chip is arranged besides the first diode chip.

Semiconductor module

A semiconductor module comprises a semiconductor chip comprising a semiconductor switch having a collector, emitter and gate, a collector terminal connected to the collector, gate terminal connected to the gate, an emitter terminal connected to the emitter via an emitter conductor path having an emitter inductance, an auxiliary emitter terminal connected to the emitter, a first conductor path connected to the emitter, and a second conductor path connected to the emitter having a different mutually inductive coupling with the emitter conductor path as the first conductor path. The first conductor path and the second conductor path are connectable to the auxiliary emitter terminal and/or the first conductor path is connected to the auxiliary emitter terminal and the second conductor path is connected to a second auxiliary emitter terminal. The semiconductor switch is an IGBT and each of the first conductor path and the second conductor path comprises bridging points for connecting the respective conductor path to the auxiliary emitter terminal.

Semiconductor module with two auxiliary emitter conductor paths

A semiconductor module includes a base plate, a substrate on the base plate and carrying at least one semiconductor chip, a housing attached to the base plate and at least partially enclosing the substrate, and at least one terminal having one end which protrudes from the housing and another end which has a terminal foot attached on a terminal pad of the metallization by means of ultrasonic welding. The housing has a protective wall which encloses the terminal and divides an interior space of the housing into an unprotected region and a protected region. The protective wall is formed such that a gap is formed between the substrate and the protective wall. The gap is designed to carry a fluid flow such that particles produced during the ultrasonic welding of the terminal foot to the terminal pad are prevented from penetrating into the protected region from the unprotected region.

Semiconductor module with ultrasonically welded terminals

Exemplary embodiments provide a substrate for mounting multiple power transistors. The substrate has a first metallization on which the power transistors are mountable with an associated collector or emitter, and which extends in at least one line on the substrate. A second metallization extends in an area next to the at least one line of the first metallization, for connection to the remaining ones of the emitters or collectors of the power transistors. A third metallization allows connection to gate contact pads of the power transistors. The third metallization includes a gate contact and at least two gate metallization areas, which are interconnectable. The gate metallization areas are arranged in parallel to the at least one line and spaced apart in a longitudinal direction of the at least one line. At least one gate metallization area is provided as a gate island surrounded on the substrate by the second metallization.

Substrate for mounting multiple power transistors thereon and power semiconductor module

A power semiconductor module includes a base plate and at least one pair of substrates mounted on the base plate. Multiple power semiconductors are mounted on each substrate. The power semiconductors are arranged on each substrate with a different number of power semiconductors along opposite edges thereof. The at least one pair of substrates is arranged on the base plate with the respective edges of the substrates provided with a lower number of power semiconductors facing towards each other.

A system includes at least two power semiconductor chips being connected in parallel and including each a gate terminal for switching the power semiconductor chip in a blocking-state by a first gate voltage and for switching the power semiconductor chip in a conducting-state by a second gate voltage. The system includes further a control device adapted for applying the first or the second gate voltage to the gate terminals of the at least two power semiconductor chips. The control device is adapted for applying a third gate voltage to the gate terminal of the at least one remaining power semiconductor chip when a power semiconductor chip fails, and that the third gate voltage is higher than the second gate voltage.

System and method for controlling at least two power semiconductors connected in parallel

The present disclosure relates to a base plate, for example, for a power module, including a matrix formed of metal, for example, aluminum, wherein at least two reinforcements are provided in the matrix next to each other, and wherein the reinforcements are spaced apart from each other.

Base plate

An electrical conductor includes a primary electrical contact, at least one secondary electrical contact, and a connection element. The connection element electrically connects the first and the at least one secondary electrical contacts, and includes at least one plate-like region. Each plate-like region includes at least one deflection component with at least one first and at least one second pivot, wherein the first and second pivots of each deflection means are arranged such that each secondary electrical contact is movable relative to the primary electrical contact in a deflection direction, without creation of a shear force.

Growing community of inventors

Staufen, Switzerland

Samuel Hartmann