Broadcom Corporation

Avago Technologies General IP (singapore) Pte. Ltd.

Avago Technologies International Sales Pte. Limited

Sampath Komarapalayam Karikalan

Sam Ziqun Zhao

Pieter Vorenkamp

Rezaur Rahman Khan

Edward Law

Xiangdong Chen

Kevin Kunzhong Hu

Zhihui Wang

Neal Andrew Kistler

Boon Leong Tan

Jin Seong Choi

Inductors are fabricated in core layers according to a predefined semiconductor package manufacturing process rules. The inductors provide an embedded substrate trace inductor solution. The inductors may be part of an on-chip voltage regulator or any other circuit design. The inductors provide a core spiral structure to help increase inductance, particularly using magnetic field coupling between inductors. The core layers provide thicker and heavier conductive segments for the inductors, particularly as compared to inductors fabricated in build-up layers according to the semiconductor package manufacturing process rules.

Embedded substrate core spiral inductor

A 3-dimensional (3-D) magnetic core device includes a substrate, a first magnetic shell formed on the substrate, and a first group of conductive traces embedded in a first insulator layer formed on the first magnetic shell. A magnetic core plane is formed on the first insulator layer, and a second group of conductive traces are embedded in a second insulator layer formed on the magnetic core plane. A second magnetic shell is formed on the second insulator layer, and the first and second group of conductive traces are conductively coupled by using conductive vias.

Magnetic-core three-dimensional (3D) inductors and packaging integration

There are disclosed herein various implementations of semiconductor packages including a bridge interposer. One exemplary implementation includes a first active die having a first portion situated over the bridge interposer, and a second portion not situated over the bridge interposer. The semiconductor package also includes a second active die having a first portion situated over the bridge interposer, and a second portion not situated over the bridge interposer. The second portion of the first active die and the second portion of the second active die include solder balls mounted on a package substrate, and are configured to communicate electrical signals to the package substrate utilizing the solder balls and without utilizing through-semiconductor vias (TSVs).

Semiconductor package with a bridge interposer

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Irvine, CA, United States of America

Sampath Komarapalayam Karikalan