Rambus Inc.

Samir A Patel

Benedict C Lau

Tsyr-Chyang Ho

Jason C Wei

Yiu-Fai Chan

An interface circuit providing a high speed bus. According to one embodiment, the interface circuitry includes a plurality of I/O pins coupled to a plurality of bus drivers, wherein each bus driver is configured to adjust the rise time, fall time, and drive strength of outputs signal on the I/O pins based on process-voltage-temperature ('PVT') conditions. The circuitry used to adjust the I/O outputs includes a slew rate control circuit, a current control circuit, and a delay lock loop ('DLL').

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Los Altos, CA, United States of America

Samir A Patel