Murata Manufacturing Co., Ltd.

Murata Electronics Oy

Sami Nurmi

Heikki T Kuisma

Kimmo Kaija

Nikolai Mäntyoja

Jukka Eskelinen

An electrical component including a substrate, a first dielectric layer on the substrate, a redistribution layer pad on the first dielectric layer, and a component interconnection element on the redistribution layer pad so that the component interconnection element fills an opening in the second dielectric layer. The opening includes at least one protrusion between the component interconnection element solder ball metallization and the redistribution layer pad.

Electrical component with component interconnection element

A method of making a system-in-package device, and a system-in-package device is disclosed. In the method, at least one first species die with predetermined dimensions, at least one second species die with predetermined dimensions, and at least one further component of the system-in-device is included in the system-in package device. At least one of the first and second species dies is selected for redimensioning, and material is added to at least one side of the selected die such that the added material and the selected die form a redimensioned die structure. A connecting layer is formed on the redimensioned die structure. The redimensioned die structure is dimensioned to allow mounting of the non-selected die and the at least one further component into contact with the redimensioned die structure via the connecting layer.

Method of making a system-in-package device, and a system-in-package device

A microelectromechanical device that comprises a wafer plate, a group of one or more wafer connector elements, and an electrical distribution layer between them. For reduced device thickness, the wafer plate comprises at least two dies and bonding material that bonds the at least two dies alongside each other to the longitudinal extent of the wafer plate, wherein at least one of the dies is a microelectromechanical die. The electrical distribution layer covers the wafer plate and includes a layer of dielectric material and a layer of conductive material, wherein the layer of conductive material is patterned within the layer of dielectric material for electrical interconnection of the dies and the wafer connector elements. With the new configuration, significantly reduced MEMS device thicknesses are achieved.

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Tuusula, Finland

Sami Nurmi