Qualcomm Incorporated

Entropic Communications, Inc.

Sameer Vasantlal Vora

Bhushan Shanti Asuri

Krishnaswamy Thiagarajan

Ayush Mittal

Jeremy Darren Dunworth

Dongwon Seo

Vinod Panikkath

Shahin Mehdizad Taleie

Behnam Sedighi

Ashok Swaminathan

Nitz Saputra

Mahim Ranjan

Ibrahim Ramez Chamas

Wing Fat Andy Lau

Zhilong Tang

Tonmoy Biswas

Ping Wing Lai

Yen-Wei Chang

Sy-Chyuan Hwu

A communication circuit may include a first pair of digital-to-analog converters (DACs) coupled to an input of a first mixer and configured to generate first baseband signals. The communication circuit may further include a second pair of DACs coupled to an input of a second mixer and configured to generate second baseband signals. The second baseband signals may be shifted in phase relative to the first baseband signals.

Communication circuit including a transmitter

A system includes: a baseband phase generator configured to receive differential in-phase (I) and quadrature (Q) signals and configured to output N phase-shifted baseband signals, wherein N is greater than 4, further wherein the baseband phase generator comprises a plurality of notch filters configured to receive the I and Q signals; and an upconverter configured to receive the phase-shifted baseband signals, to perform mixing on the phase-shifted baseband signals, and to output a differential upconverted signal.

Systems and methods to provide upconverting with notch filtering

A system includes a first circuit and a second circuit. The first circuit includes a first MOS transistor having a gate and a drain. The first circuit is configured to receive a radio frequency (RF) signal at the gate of the first MOS transistor. The drain of the first MOS transistor is configured to output a first current that is proportional to the square of the input voltage of the RF signal while receiving the RF signal. The second circuit includes a second MOS transistor having a source configured to receive a first current from the first circuit. The second MOS transistor is biased in a triode region and has a channel resistance between the source and a drain. The second circuit is configured to output a voltage proportional to the value of the power of the RF signal received by the first circuit.

Method and system for a wideband CMOS RMS power detection scheme

Methods and systems for a wideband CMOS RMS power detection scheme may comprise: a first circuit including a first metal oxide semiconductor (MOS) transistor having a gate for receiving a radio frequency (RF) signal and having a drain for outputting a first current that is proportional to a square of a voltage of the RF signal in response to receiving the RF signal; and a second circuit connected to the first circuit, the second circuit comprising a second MOS transistor biased in a triode region and having a source for receiving the first current from the first circuit. The second circuit may output a voltage proportional to a power of the RF signal received by the first circuit, the output voltage being a function of the first current and a channel resistance of the second MOS transistor.

Metod and system for a wideband CMOS RMS power detection scheme

Wideband CMOS RMS power detection system

Methods and apparatuses are presented for harmonic reject upconverting a baseband signal using at least one quadrature passive upconversion mixer. In some embodiments, an apparatus may include a first quadrature passive mixer configured to receive a first baseband input and a first LO input, and a second quadrature passive mixer configured to receive a second baseband input and a second LO input. A first output of said first passive mixer may be directly connected to a first output of said second passive mixer and together coupled to a first amplifier input. A second output of said first passive mixer may be directly connected to a second output of said second passive mixer and together coupled to a second amplifier input. The transmitter may be configured to output an upconverted signal with at least one rejected harmonic spurious mixing product based on the first and second amplifier inputs.

Harmonic rejective passive up converter

The transmission path of a communication device includes, in part, N upconverters each of which receives M phases of a signal to be transmitted. Each upconverter further receives one of N sets of phases of a LO signal. Each of the N sets includes M phases of the LO signal. The communication device further includes at least one combiner, and N amplifiers each responsive to a different one of the N upconverters to generate N amplified signals. The combiner combines the N amplified signals to generate an output signal. By selecting the gain of one of the amplifiers to be different than the gain of the remaining amplifiers, the undesired harmonics of the signal to be transmitted, caused by non-linearity of the amplifiers, is reduced. Each upconverter optionally includes a multitude of upconverters whose outputs are combined to further reduce the spurious harmonic upconversion products and the counter-intermodulation distortion (IM3).

Suppression of spurious harmonics generated in TX driver amplifiers

Wideband CMOS RMS power detection scheme

Growing community of inventors

San Diego, CA, United States of America

Sameer Vasantlal Vora