Qualcomm Incorporated

Intel Corporation

Sameer Nanavati

Jong Hyeon Park

Je Woo Kim

Bok Tae Sim

Serguei A Glazko

Ju Won Park

James Young Hurt

Tae Ryun Chang

Nicholas E Duresky

Mark B Rosenbluth

Sridhar Lakshmanamurthy

Saurin Shah

Chun Woo Lee

Mason B Cabot

Sunil B Chaudhari

Corey Gee

Bapi Vinnakota

Chae Kwan Lee

James Y Hurt

A synchronization and detection method in a wireless device may include performing coarse detection and synchronization with respect to a received signal. The synchronization and detection method may also include performing fine detection and synchronization for acquisition of the received signal. Results of the coarse detection and synchronization may be used for the fine detection and synchronization. The synchronization and detection method may also include performing tracking mode processing when the acquisition of the received signal has been achieved.

Methods and apparatus for synchronization and detection in wireless communication systems

A method and apparatus for combining retransmitted hybrid automatic repeat-request (HARQ) messages divided into coding blocks in an orthogonal frequency-division multiplexing (OFDM)/orthogonal frequency-division multiple access (OFDMA) receiver are provided. According to such a coding-block-based HARQ combining scheme, the quality of each coding block may be compared to a threshold to determine whether the decoded bits or the HARQ combined signal should be saved for each coding block for subsequent HARQ iterations. In addition to reducing the required HARQ buffer size while preserving the combining gain, coding-block-based HARQ combining may also provide fast decoding and reduced power consumption when compared to conventional HARQ combining techniques.

Coding block based HARQ combining scheme for OFDMA systems

A method and apparatus for combining retransmitted hybrid automatic repeat-request (HARQ) messages at different stages in an OFDM/OFDMA receiver are provided. A combination of different types of HARQ combiners may be designed into the receiver and selected on a per-channel basis. Proper selection of a HARQ combining scheme may reduce the required HARQ buffer size and may provide an increased combining gain when compared to conventional HARQ combining techniques. Furthermore, the HARQ combiner type may be dynamically selected through forward and reverse shifting between the different types of HARQ combining schemes in an effort to decrease the bit error ratio (BER) without saturating the HARQ buffer.

Forward and reverse shifting selective HARQ combining scheme for OFDMA systems

A method and apparatus for combining retransmitted hybrid automatic repeat-request (HARQ) messages at different stages in an orthogonal frequency-division multiplexing (OFDM)/orthogonal frequency-division multiple access (OFDMA) receiver are provided. The type of HARQ combiner used for a particular channel may depend on a number of selection criteria including the modulation order of the transmission, the number of bits needed for the combined signals, and the headroom in the HARQ buffer. For some embodiments, a combination of different types of HARQ combiners may be designed into a receiver and selected on a per-channel basis. Proper selection of a HARQ combining scheme may reduce the required HARQ buffer size and may provide an increased combining gain when compared to conventional HARQ combining techniques.

Selective HARQ combining scheme for OFDM/OFDMA systems

A method and apparatus for decoding encoded data bits of a wireless communication transmission are provided. A set of a-priori bit values corresponding to known bit values of the encoded data bits may be generated. Decoding paths that correspond to decoded data bits that are inconsistent with the a-priori bit values may be removed from the possible decoding paths to consider, and decoding the encoded data bits by selecting a decoding path from remaining decoding paths of the possible decoding paths that were not removed. Multiple hypotheses, each corresponding to a different set of a-prior bit values may be evaluated, with the decoded data for a hypothesis selected based on the evaluation output for further processing.

Decoding scheme using multiple hypotheses about transmitted messages

Method and apparatus to enable I/O agents to perform atomic operations in shared, coherent memory spaces. The apparatus includes an arbitration unit, a host interface unit, and a memory interface unit. The arbitration unit provides an interface to one or more I/O agents that issue atomic transactions to access and/or modify data stored in a shared memory space accessed via the memory interface unit. The host interface unit interfaces to a front-side bus (FSB) to which one or more processors may be coupled. In response to an atomic transaction issued by an I/O agent, the transaction is forked into two interdependent processes. Under one process, an inbound write transaction is injected into the host interface unit, which then drives the FSB to cause the processor(s) to perform a cache snoop. At the same time, an inbound read transaction is injected into the memory interface unit, which retrieves a copy of the data from the shared memory space. If the cache snoop identifies a modified cache line, a copy of that cache line is returned to the I/O agent; otherwise, the copy of the data retrieved from the shared memory space is returned.

Method and apparatus to enable I/O agents to perform atomic operations in shared, coherent memory spaces

An embodiment of the present invention includes first and second storage elements. The first storage element stores request information transmitted from a first processor operating at a first frequency. The first and second processors operate at different frequencies. The request information is organized according to a request format. The second storage element stores response information transmitted by a second processor operating at a second frequency different than the first frequency in response to the request information. The response information is organized according to a response format.

Asynchronous communication protocol using efficient data transfer formats

A method, apparatus, and system for communicating between a digital signal processor (DSP) and a packet processor.

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Fremont, CA, United States of America

Sameer Nanavati