Arizona State University

Qualcomm Mems Technologies, Inc.

Arizona Board of Regents, a Body Corporate

Sameer M Venugopal

David R Allee

Narendra V Lakamraju

Lawrence T Clark

Curtis D Moyer

Edward John Bawolek

Koorosh Aflatooni

Wilhelmus Johannes Robertus Van Lier

Stephen R Phillips

Nao Sugawara Chuei

Pramod Kumar Varma

Nazanin Darbanian

Aritra Dey

Ramesh K Goel

The present invention provides devices and methods for testing the electrical performance of thin-film transistor backplane arrays and protecting thin-films during testing and handling.

Methods and system for electrostatic discharge protection of thin-film transistor backplane arrays

This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for calibrating display arrays. In one aspect, a method of calibrating a display array includes determining a particular drive response characteristic and updating a particular drive scheme voltage between updates of image data on the display array.

System and method of updating drive scheme voltages

The present invention provides devices capable of testing the electrical performance of thin-film transistor backplane arrays and methods for their use.

Methods and system for on-chip decoder for array test

Embodiments of embedded MEMS sensors and related methods are described herein. Other embodiments and related methods are also disclosed herein.

Embedded microelectromechanical systems sensor and related devices and methods

Embedded MEMS sensors and related methods

Embodiments of displays with embedded MEMS sensors and related methods are described herein. Other embodiments and related methods are also disclosed herein.

Displays with embedded MEMS sensors and related methods

Embodiments and examples of differential threshold voltage non-volatile memories and related methods are described herein. Other embodiments, examples thereof, and related methods are also disclosed herein.

Differential threshold voltage non-volatile memory and related methods

Embodiments and examples of differential threshold voltage non-volatile memories and related methods are described herein. In one example, a method for providing an integrated circuit can comprise providing a memory cell coupled to a first bitline and to a second bitline, and at least one of (a) providing a read assist mechanism configured to couple to the memory cell via the first and second bitlines, or (b) providing a memory reset mechanism configured to couple to the memory cell via the first and second bitlines. Providing the memory cell can comprise providing a first transistor comprising a first threshold voltage, providing a second transistor comprising a second threshold voltage, and cross-coupling the first and second transistors of the memory cell together. A difference between the first and second threshold voltages can correspond to a logic state of the memory cell. Other embodiments, examples, and related methods are also disclosed herein.

Embodiments of amplifiers with depletion and enhancement mode thin film transistors are disclosed herein. Other examples, devices, and related methods are also disclosed herein.

Growing community of inventors

San Jose, CA, United States of America

Sameer M Venugopal