Samsung Electronics Co., Ltd.

Sam Young Bang

Seung Jun Bae

Kwang Il Park

Gil Shin Moon

Ki Woong Yeom

A method and apparatus for tuning a phase of a data clock signal having a different frequency than a main clock signal. The method of tuning includes coarse tuning by receiving the data clock signal, dividing the data clock signal to generate a frequency-divided clock signal having a same frequency as the main clock signal, repeatedly shifting the frequency-divided clock signal to generate multiphase frequency-divided clock signals at a predetermined phase interval, comparing a phase of each of the multiphase frequency-divided clock signals with a phase of the main clock signal, and determining a phase shift amount based on a comparison result, and fine tuning by comparing a phase of a multiphase frequency-divided clock signal corresponding to the phase shift amount with the phase of the main clock signal and adjusting the phase of the data clock signal by a predetermined phase step based on the comparison result.

Method and apparatus for tuning phase of clock signal

An automatic reference voltage controller of an integral A/D converter comprises a reference voltage switching circuit, an input voltage switching circuit, a Miller integrator, a comparing circuit, a logic circuit, and an automatic reference voltage control means for reducing the output error of the integral A/D converter. According to the present invention, the error of the digital output signal due to the limit error of the integral A/D converter can be reduce by automatic control of the reference voltage.

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Yongin-si, South Korea

Sam Young Bang