Inside Secure

Wisekey Semiconductors

Salwa Bouzekri Alami

A memory including at least one line to which memory cells are coupled. A control circuit is configured to emit an end-of-operation signal at the end of the execution of an operation on at least one memory cell, and a glitch detection circuit coupled to the memory line is configured to supply a glitch detection signal when a falling edge of the amplitude of a voltage signal appears on the memory line in the absence of the end-of-operation signal.

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Aix en Provence, France

Salwa Bouzekri Alami